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UDB and Routing Examples

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Andreas Wagner edited this page Oct 12, 2017 · 3 revisions

Reading and Writing PSoC registers from the KitProg

UDB array and routing configurations can be implemented on the PSoC over the KitProg SWD debugger/programmer without involving the ARM core:

  1. Get PSoC 5LP flash support in your OpenOCD tree: git clone http://repo.or.cz/openocd.git && cd openocd && git fetch http://openocd.zylin.com/openocd refs/changes/32/3432/20 && git cherry-pick FETCH_HEAD
  2. Build & install.
  3. sudo openocd -f interface/kitprog.cfg -c kitprog_init_acquire_psoc -f target/psoc5lp.cfg -c "telnet_port 4444"
  4. Erase the entire PSoC 5LP flash. The register values won't stick otherwise.
  5. telnet localhost 4444
  6. It should now be possible to read and write registers on the PSoC, but don't halt the PSoC. Some registers won't stick if you do.
  psoc5lp.cpu mdb address [count]
        Display target memory as 8-bit bytes
  psoc5lp.cpu mdh address [count]
        Display target memory as 16-bit half-words
  psoc5lp.cpu mdw address [count]
        Display target memory as 32-bit words
  psoc5lp.cpu mem2array arrayname bitwidth address count
        Loads Tcl array of 8/16/32 bit numbers from target memory
  psoc5lp.cpu mwb address data [count]
        Write byte(s) to target memory
  psoc5lp.cpu mwh address data [count]
        Write 16-bit half-word(s) to target memory
  psoc5lp.cpu mww address data [count]
        Write 32-bit word(s) to target memory

flashing an image

reset init; psoc5lp mass_erase 0; flash write_bank 0 demo.bin 0x0; reset

The repository https://github.com/kiml/PSOC_compiler contains some examples that will run on the PSoC 5LP from the ARM as well as a way to include startup config.

sample config #0: route from portpin 2.2 to portpin 2.1 (blue led) through the DSI

;# light up the blue led on portpin 2.1 when 3.3v is applied to portpin 2.2
;# routes through DSI5_DSIINP into DSI5_HC and back out through DSIOUTT to the blue led
psoc5lp.cpu mwb 0x40005110 0x00 96   ;# PRT1-PRT6
psoc5lp.cpu mwb 0x400051C0 0x00 16   ;# PRT12_DR
psoc5lp.cpu mwb 0x400051F0 0x00 16   ;# PRT15_DR
psoc5lp.cpu mwb 0x40010000 0x00 4096 ;# UDB Bank 0
psoc5lp.cpu mwb 0x40011400 0x00 2048 ;# UDB Bank 1
psoc5lp.cpu mwb 0x40014000 0x00 2560 ;# DSI0
psoc5lp.cpu mwb 0x40014C00 0x00 512  ;# DSI12
psoc5lp.cpu mwb 0x40015000 0x00 32   ;# MDCLK_EN
psoc5lp.cpu mwb 0x40005210 0x02 1    ;# PRT2_OUT_SEL0
psoc5lp.cpu mwb 0x40005211 0x02 1    ;# PRT2_OUT_SEL1
psoc5lp.cpu mwb 0x400145C0 0x02 1    ;# DSI5_DSIINP0
psoc5lp.cpu mwb 0x400145D6 0x04 1    ;# DSI5_DSIOUTT1
psoc5lp.cpu mwb 0x40005122 0x04 1    ;# PRT2_DM0
psoc5lp.cpu mwb 0x40005123 0x02 1    ;# PRT2_DM1
psoc5lp.cpu mwb 0x40005124 0x02 1    ;# PRT2_DM2
psoc5lp.cpu mwb 0x40005125 0x00 1    ;# PRT2_SLW
psoc5lp.cpu mwb 0x40005126 0x02 1    ;# PRT2_BYP
psoc5lp.cpu mwb 0x40005127 0x00 1    ;# PRT2_BIE
psoc5lp.cpu mwb 0x40005128 0x00 1    ;# PRT2_INP_DIS
psoc5lp.cpu mwb 0x40005129 0x00 1    ;# PRT2_CTL
psoc5lp.cpu mwb 0x40015003 0x02 1    ;# BCTL0_BANK_CTL
psoc5lp.cpu mwb 0x40015013 0x02 1    ;# BCTL1_BANK_CTL

sample config #1: route from portpin 6.4 to portpin 2.1 (blue led) through two DSI tiles

This sample makes use of HC, HS, HV, in addition to DSI PI because it spans two DSI tiles.

;# light up the blue led on portpin 2.1 when 3.3v is applied to portpin 6.4
;# route: DSI4_DSIINP -> DSI4_HC -> DSI5_HS ->  DSI5_HV_L -> DSI5_HC and back out through DSI5_DSIOUTT to the blue led
psoc5lp.cpu mwb 0x40005110 0x00 96   ;# PRT1-PRT6
psoc5lp.cpu mwb 0x400051C0 0x00 16   ;# PRT12_DR
psoc5lp.cpu mwb 0x400051F0 0x00 16   ;# PRT15_DR
psoc5lp.cpu mwb 0x40010000 0x00 4096 ;# UDB Bank 0
psoc5lp.cpu mwb 0x40011400 0x00 2048 ;# UDB Bank 1
psoc5lp.cpu mwb 0x40014000 0x00 2560 ;# DSI0
psoc5lp.cpu mwb 0x40014C00 0x00 512  ;# DSI12
psoc5lp.cpu mwb 0x40015000 0x00 32   ;# MDCLK_EN
psoc5lp.cpu mwb 0x40005210 0x02 1    ;# PRT2_OUT_SEL0
psoc5lp.cpu mwb 0x40005211 0x02 1    ;# PRT2_OUT_SEL1
psoc5lp.cpu mwb 0x400144C2 0x08 1    ;# DSI4_DSIINP1
psoc5lp.cpu mwb 0x40014598 0x01 1    ;# DSI5_HS8
psoc5lp.cpu mwb 0x400145D6 0x04 1    ;# DSI5_DSIOUTT1
psoc5lp.cpu mwb 0x40005162 0x00 1    ;# PRT6_DM0
psoc5lp.cpu mwb 0x40005163 0x04 1    ;# PRT6_DM1
psoc5lp.cpu mwb 0x40005164 0x04 1    ;# PRT6_DM2
psoc5lp.cpu mwb 0x40005122 0x00 1    ;# PRT2_DM0
psoc5lp.cpu mwb 0x40005123 0x02 1    ;# PRT2_DM1
psoc5lp.cpu mwb 0x40005124 0x02 1    ;# PRT2_DM2
psoc5lp.cpu mwb 0x40005125 0x00 1    ;# PRT2_SLW
psoc5lp.cpu mwb 0x40005126 0x02 1    ;# PRT2_BYP
psoc5lp.cpu mwb 0x40005127 0x00 1    ;# PRT2_BIE
psoc5lp.cpu mwb 0x40005128 0x00 1    ;# PRT2_INP_DIS
psoc5lp.cpu mwb 0x40005129 0x00 1    ;# PRT2_CTL
psoc5lp.cpu mwb 0x40015003 0x02 1    ;# BCTL0_BANK_CTL
psoc5lp.cpu mwb 0x40015013 0x02 1    ;# BCTL1_BANK_CTL

psoc5lp.cpu mwb 0x40005034 0x0D 1    ;# light it up!
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