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Cypress PSoC

cyrozap edited this page Aug 4, 2016 · 13 revisions

PSoC UDB Architecture

The architecture is shared between the three device families that currently use it.

Quoth the 5LP Architecture TRM, §21.1:

  • For optimal flexibility, each UDB contains several components:
    • ALU-based 8-bit datapath (DP) with an 8-word instruction store and multiple registers and FIFOs
    • Two PLDs, each with 12 inputs, eight product terms and four macrocell outputs
    • Control and status modules
    • Clock and reset modules

The UDBs (Universal Digital Blocks, see UDB Registers), their routing infrastructure, and the DSI (Digital System Interconnect, see DSI Registers) are configured by using the ARM core to load memory-mapped registers. The documentation for these registers is in the Architecture TRM (linked above) and the Registers TRM for each family of PSoC.

Some PSoC Creator app notes and user guides describe the lower-level operation of the UDBs:

Related Patents

See PSoC Patents.

Development Kits

While these links in the tables below point to the Cypress website, they are often available through other distributors like DigiKey and Mouser.

The best value board for developing an open toolchain is currently the CY8CKIT-059 at $10, due to the fact you get two separate PSoC 5LP chips in a single kit that normally cost ~$12 each.

PSoC 5LP

Product Description Price
CY8CKIT-059 PSoC® 5LP Prototyping Kit With Onboard Programmer and Debugger $10
CY8CKIT-050 PSoC® 5LP Development Kit $99

PSoC 4

Product Description Price
CY8CKIT-043 PSoC® 4 M-Series Prototyping Kit $10
CY8CKIT-042 PSoC® 4 Pioneer Kit $25
CY8CKIT-044 PSoC® 4 M-Series Pioneer Kit $25
CY8CKIT-046 PSoC® 4 L-Series Pioneer Kit $49