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awygle edited this page Jul 23, 2017
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Welcome to the open FPGA tools wiki!
Note: This project is NOT affiliated with OpenFPGA INC.
Device/Vendor | Status | Note |
---|---|---|
[[Cypress PSoC 5(LP)/4/3 | Cypress PSoC]] | Not yet started |
[[Silego Greenpak 4/5 | Silego GreenPak]] | Can go from HDL to bitstream for most digital functions and some analog of SLG46620V |
Xilinx CoolRunner-II | Most of bitstream mapping for XC2C32A done, partial place-and-route, no HDL integration | TODO: merge code from azonenberg's internal SVN |
Xilinx 7 series | Wishlist, no actual work done |
TODO: List other projects here to avoid duplicating work
Project | Description |
---|---|
Yosys | Open Verilog synthesis for a number of FPGAs |
arachne-pnr | Place-and-route for iCE40 FPGAs |
IceStorm | Bitstream manipulation tools for iCE40 FPGAs |
fpgatools | FPGA toolchain for xc6slx9 |
fpgalivereprog | full dynamic partial live reconfiguration for xc6slx9 FPGA: spec, blog |
torc | Tools for Open Reconfigurable Computing paper [PDF] thesis [PDF] |
debit | From the bitstream to the netlist: paper [PDF] |