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Cypress PSoC
The architecture is shared between the three device families that currently use it.
Quoth the 5LP Architecture TRM, §21.1:
- For optimal flexibility, each UDB contains several components:
- ALU-based 8-bit datapath (DP) with an 8-word instruction store and multiple registers and FIFOs
- Two PLDs, each with 12 inputs, eight product terms and four macrocell outputs
- Control and status modules
- Clock and reset modules
The UDBs (Universal Digital Blocks, see UDB Registers), their routing infrastructure, and the DSI (Digital System Interconnect, see DSI Registers) are configured by using the ARM core to load memory-mapped registers. The documentation for these registers is in the Architecture TRM (linked above) and the Registers TRM for each family of PSoC.
Some PSoC Creator app notes and user guides describe the lower-level operation of the UDBs:
- Application Notes
- User Guides
Patent | Description |
---|---|
US20080258760 | System level interconnect with programmable switching |
US20080263319 | Universal digital block with integrated arithmetic logic unit |
US20080263334 | Dynamically configurable and re-configurable data path |
US5502403 | High speed configuration independent programmable macrocell |
US5799176 | Method and apparatus for providing clock signals to macrocells of logic devices |
US5966027 | Symmetric logic block input/output scheme |
US6134181 | Configurable memory block |
US6140853 | Digital phase detector and charge pump system reset and balanced current source matching |
US6275117 | Circuit and method for controlling an output of a ring oscillator |
US6338109 | Microcontroller development system and applications thereof for development of a universal serial bus microcontroller |
US6526470 | Fifo bus-sizing, bus-matching datapath architecture |
US6711226 | Linearized digital phase-locked loop |
US6864710 | Programmable logic device |
US6910126 | Programming methodology and architecture for a programmable analog system |
US6971004 | System and method of dynamically reconfiguring a programmable integrated circuit |
US7068205 | Circuit, method, and apparatus for continuously variable analog to digital conversion |
US7221187 | Programmable microcontroller architecture (mixed analog/digital) |
US8026739 | System level interconnect with programmable switching |
US8476928 | System level interconnect with programmable switching |
US8601254 | Configurable reset pin for input/output port |
US8639850 | Addressing scheme to allow flexible mapping of functions in a programmable logic array |
US8736303 | PSOC architecture |
WO2008131136A1 | Universal digital block interconnection and channel routing |
While these links in the tables below point to the Cypress website, they are often available through other distributors like DigiKey and Mouser.
The best value board for developing an open toolchain is currently the CY8CKIT-059 at $10, due to the fact you get two separate PSoC 5LP chips in a single kit that normally cost ~$12 each.
Product | Description | Price |
---|---|---|
CY8CKIT-059 | PSoC® 5LP Prototyping Kit With Onboard Programmer and Debugger | $10 |
CY8CKIT-050 | PSoC® 5LP Development Kit | $99 |
Product | Description | Price |
---|---|---|
CY8CKIT-043 | PSoC® 4 M-Series Prototyping Kit | $10 |
CY8CKIT-042 | PSoC® 4 Pioneer Kit | $25 |
CY8CKIT-044 | PSoC® 4 M-Series Pioneer Kit | $25 |
CY8CKIT-046 | PSoC® 4 L-Series Pioneer Kit | $49 |