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feat: implement SerializableModuleElaborator #4409
feat: implement SerializableModuleElaborator #4409
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Signed-off-by: unlsycn <[email protected]>
src/main/scala/chisel3/experimental/util/SerializableModuleElaborator.scala
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src/main/scala/chisel3/experimental/util/SerializableModuleElaborator.scala
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Signed-off-by: unlsycn <[email protected]>
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Maybe you or someone can add more documents in the documentation on how to use the SerializableModule in the future, I think for now the chisel-nix project already give a comprehensive example to it. Please update that to use this Elaborator, and point new users to there.
case _: firrtl.options.Unserializable => None | ||
case a => Some(a) | ||
} | ||
val firrtlStream: Readable = fir.serialize |
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I still doubt there is an extra copy to Sting here, but the return type is good now and we can improve the internal performance with StringBuild in the future.
* feat: implement SerializableModuleElaborator Signed-off-by: unlsycn <[email protected]> * fix: return tuple of Readable from designImpl Signed-off-by: unlsycn <[email protected]> --------- Signed-off-by: unlsycn <[email protected]>
This PR implements the SerializableModuleElaborator trait, which is used to create elaborators for SerializableModule. In t1, we compile all the Scala code into a jar file and specify different main classes to elaborate different modules.
The config API is used to guarantee the type safety of the parameters, and the design API actually produces the circuit, which is used this way:
Contributor Checklist
docs/src
?Type of Improvement
Desired Merge Strategy
Release Notes
Add SerializableModuleElaborator
Reviewer Checklist (only modified by reviewer)
3.6.x
,5.x
, or6.x
depending on impact, API modification or big change:7.0
)?Enable auto-merge (squash)
, clean up the commit message, and label withPlease Merge
.Create a merge commit
.