release_v20231110_0

Verify full cert chain in `test_generate_csr_stress`.

This adds checking the LDEV and FMC alias certificates to the test.

release_v20231109_0

Enable FPGA Realtime Model Clock Gating (#1021)

Co-authored-by: Kor Nielsen <[email protected]>

release_v20231108_0

cfia_assert_eq_N_words: Use explicit registers.

This allows for smaller code because we can guarantee the register ids
fit in the 16-bit encoding.

release_v20231107_0

[fix] Make CFI wrappers force inline. (#1045)

This fix adds the force inline attribute to CFI wrappers.

release_v20231104_0

Ecc384::key_pair: make ecc_private_key_usage mandatory. (#1042)

The real firmware always sets this, and making this mandatory gets rid
of the branch around the pairwise-consistency check, which was a CFI
risk.

release_v20231103_0

Update bitflags 2.0.1 -> 2.4.0. (#805)

By using the same version as caliptra-dpe, we can avoid some confusion
about which version of bitflags we're actually compiling against.

Also, unlike 2.0.1, 2.4.0 has been vetted by Google:
https://github.com/google/rust-crate-audits/blob/main/audits.toml

release_v20231102_0

[fix] Remove extra entropy for Xoshiro S* variables (#1015)

This change removes the non-zeroing of the Xoshiro S* variables since ECC needs to be initialized on them.

release_v20231101_0

[fix] Return fake random numbers if RNG h/w block unavailable (#935)

release_v20231031_0

[fix] Return fake random numbers if RNG h/w block unavailable (#935)

release_v20231028_0

[fix] Return fake random numbers if RNG h/w block unavailable (#935)