Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

[RTL] Convert APB interfaces to AXI and add DMA #590

Open
wants to merge 65 commits into
base: main
Choose a base branch
from

Conversation

calebofearth
Copy link
Collaborator

@calebofearth calebofearth commented Sep 11, 2024

Changelist

  • Convert soc_ifc APB slave interface to AXI subordinate.
  • Add new AXI DMA to Caliptra soc_ifc with AXI manager to enable Caliptra Active mode.
  • Update caliptra_top_tb to support AXI based testing, use AXI tasks instead of FSM for r/w, add smoke tests for AXI bringup and DMA operations.
  • Ensure Verilator still works on the AXI TB

Still TODO

  • Migrate UVM environment from APB to AXI
  • Update soc_ifc directed register tests for AXI
  • Comprehensive testplan for AXI DMA functionality
  • Verify the Flush functionality for AXI DMA

Task tracking

Resolves #563
Resolves #564

calebofearth and others added 30 commits September 11, 2024 15:25
Ready & valid are 1-bit wide, do not access using bit select / range.

Signed-off-by: Wiktoria Kuna <[email protected]>
When 'r_pri' is not set, read operation should be granted only if
a read 'r_dv' is pending and there's no required write action 'w_dv'.

Signed-off-by: Wiktoria Kuna <[email protected]>
Copy link

linux-foundation-easycla bot commented Sep 11, 2024

bharatpillilli
bharatpillilli previously approved these changes Sep 12, 2024
@calebofearth calebofearth force-pushed the cwhitehead-msft-gen2-axi-modules branch 2 times, most recently from 8818a71 to fadb54e Compare September 20, 2024 23:37
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
Projects
None yet
3 participants