Code

User mode support#187

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kgugala merged 99 commits intomainchipsalliance/Cores-VeeR-EL2:mainfrom user-mode-support-antchipsalliance/Cores-VeeR-EL2:user-mode-support-antCopy head branch name to clipboardJul 5, 2024

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Commits on Jul 3, 2024

• Set the U bit in MISA CSR

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• Add initial MISA CSR test

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• Add MPP field to mstatus CSR

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• Refactored misa CSR test

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• Add test for mstatus.MPP CSR field

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• Add MPRV field to mstatus

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• Add test for mstatus.MPRV field

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• Store mstatus.MPP as inverted so that it means M after reset

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• Initial logic to store and update privilege level

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• A test demonstratin M and U privilege mode switching

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• Added ECALL.U mcause code

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• Add mstatus CSR updates caused by events that switch privilege mode.

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• Use constants to index mstatus signal bits

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• Set mstatus.MPIE to 1 on mret

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• Disallow privileged CSR access in user-mode

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• A test for CSR access from machine and user mode

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• Added missing CSRs to CSR access test, use statically determined array sizes

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• Removed debug CSR reads from csr_access test as they fail (and should fail)

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• Use privilege mode instead of effective privilege mode for CSR access checking

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• Extended the CSR access test with checks if accesses are actually happening

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• Add logic to prevent CSR data read and write in case of access failure.

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• Add custom commands to the testbench that allow software to trigger hardware interrupts

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• Add M and U mode interrupt test

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• Do not trigger external interrupt

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• Make mstatus.MIE effectively set in user mode.

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• Fixed incorrect code comments

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• Added definitions of command code constants to IRQ test

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• Prevented triggering external interrupts outside legal range in the testbench

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• Dropped external IRQ testing for now.

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• Enhanced modesw test with MPP and MPRV fields checking

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• Fix incorrect MPRV and MPP flags behavior on MRET instruction

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• Added a README.md file for the modesw test which explains its behavior.

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• Fixed typos and minor comment/readme inconsistencies

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• Treat MRET as an illegal instruction when executed from user mode

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• Add tests for particular instructions behavior in user mode

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• Added menvcfg and menvcfgh CSRs to the address decoder. Isolated the decoder to separate file(s)

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• Added menvcfg and menvcfgh to CSR read mux

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• Added menvcfg and menvcfgh CSRs to the CSR access test

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• Fixed ICCM memory module connection to VeeR core in testbench

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• Fixed hello_world_iccm test to correctly report failures.

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• Fixed incorrect assignmends for DCCM memory modules in the testbench

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• Fixed hello_world_dccm test

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• Fixed the commonly used crt0.s to catch exceptions, fixed CoreMark DCCM linker script

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• Make use of return code of main() in tests that use common crt0.s code

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• Updated IRQ tests to verify NMI operation

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• Replaced all hard-coded values in irq test with preprocessor constants

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• Added counter, instret and mcounteren CSRs

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• Deny cycle/instret user-mode access according to mcounteren settings

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• Updated the csr_access test to verify cycle,instret and mcounteren CSRs

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• Added a test for cycle / instret CSR access rights manipulation via mcounteren

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• Added code comment(s)

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• Replace constants with defines in perf_counters test code

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• Added more descriptive error messages for the perf_counters test

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• Add "user_mode" option to the config script that translates to RV_USER_MODE define

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• Add an option to tools/Makefile to control user mode enable in the config

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• Make user mode logic optional and controlled by a preprocessor macro

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• Make tests that require user-mode support fail when its not supported by the core

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• Fixed a bug in IRQ test

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• Disable mcounteren CSR logic when user mode support is disabled

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• Make performance counter test require user mode support to run

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• Use localparams to indes mstatus bits in RTL

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• Enabled presync for user-mode instret/instreth CSRs

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• Added VeeR-specific performance counters 3 to 6

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• Enhanced perf_counters test to check user-mode access control to hpmcounter3-hpmcounter6 CSRs

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• Replaced hard-coded constant with preprocessor macros

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• Add initial PMP test for user mode

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• User mode permission checking for PMP

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• More PMP test scenarios

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• Support for simulation-to-host communication via htif

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• Extended PMP tests with acutal data reading, writing and comparison

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• Extended PMP test with accesses from M mode and with MPRV bit set

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• Single data+code area for user mode, add check if user mode calls succeed

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• Add a preprocessor flag to turn Smepmp behavior on/off

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• Add clearing .bss section plus other tweaks

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• Make PMP user mode optional according to VeeR core config

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• Refactored PMP test, added tests for region locking feature.

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• Fixed typo(s)

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• Fixed typos in PMP test

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• Fix PMPCFG not being WARL, prohibit writing WR=10 combination.

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• Added checking if PMPCFG is WARL in the PMP test

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• Added MPRV=1 and MPP=11 test case to the PMP test

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• Add mseccfg/mseccfgh CSRs

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• Add mseccfg/mseccfgh to the CSR access checking test.

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• Made mseccfg.RLB sticky 0 if any PMP region is locked

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• Implement Smepmp behavior in RTL

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• Implemented effect of mseccfg.RLB on writing PMP CSRs for locked regions.

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• Use a struct for mseccfg fields

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• Make Smepmp support configurable by veer.config

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• Test for mseccfg CSR and its influence on PMP

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• Enable Smepmp in the PMP test

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• Disallow Smepmp when user mode support is disabled

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• Configure PMP to allow user-mode memory access in user-mode tests

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• Fix typos

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• Replaced hard-coded constant with helper macros

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• Make mseccfg CSR test require Smepmp to be enabled

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• Make PMP instruction fetch address checker use priv_mode_ns instead of priv_mode

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• Configure PMP in mstatus CSR test (necessery as MPRV bit alters access rights)

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• Enable VeeR User mode tests in GitHub CI

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• apply linter fixes

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