Sampling Circuit

Because the microcontroller was not integrated on the prototype board, we used an oscilloscope to validate the signal and Teensy 3.2 microcontroller to sample it and stream it a computer to test the vizualisation software. This microcontroller has two integrated 16 bits ADCs which are used to sample the signal. The program onboard the Teensy uses an internal clock to time the sampling frequency. Once enough time has passed since the last sample, the teensy goes over the next sampling cycle. One sampling cycle of the four channels takes 212 µs. This includes sampling all four channels and transmitting the data to a computer via a serial communication. The sampling cycle fits into our sample period of 5000 µs for a sample rate of 200 Hz.

For the production board, the Teensy will be replaced by an STM32F4 microcontroller and an FTDI interface and these will be included on the board. The STM32F4’s internal ADCs will be used to digitize the signal.

Note that it was chosen not to convert the ADC counts to a voltage reading. While this is simple and would have fit into the sampling cycle, quantitative voltage readings may be misleading because they depend on factors external to the EEG signal itself.