PandABrick target #143
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PandABrick target #143
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Note: this builds, but untested on hardware. Caveats: * PandABrick specific encoders files included under target/hdl * LEDs not connected up - PS disconnected, PL tied high * Verilog files for MGT and PIC adpater included as sources * Separate module included for the UltraScale+ panda_sync * DCARD_MODE needs to be block parameter and control appropriate relays * Kept all test code and modes - moved register test to new module to avoid conflict with system module
Still untested on hardware. Changes: * SFP verilog files replaced by IP tcl script * Change from using QPLL to CPLL for mgt IP
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Closes #108 |
* and propogated as generic constant.
* Limits operation to monitor-mode only until encoder block * architecture has been specified.
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Closes #145 |
* Separate ini file for both platforms to include different IP and constraints * HDL files for MGT instances in separate directories
* IP generated in verilog, and needs component instantiation. * Will build okay with direct instantiation but not function correctly!
EmilioPeJu
requested changes
Aug 6, 2024
EmilioPeJu
requested changes
Aug 6, 2024
EmilioPeJu
previously approved these changes
Aug 6, 2024
|
I approved considering my suggestions will be fixed in the PRs associated to the issues you mentioned |
EmilioPeJu
previously approved these changes
Aug 8, 2024
tomtrafford
approved these changes
Aug 15, 2024
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Adding PandABrick target to the PandABlocks framework.
Note this PR constitutes a re-packaging of the source code as provided, into the format required for building in PandABlocks. It addresses some, but does not attempt to fix all the known remaining issues. Some of which will be addressed with specific tickets.
See individual commit messages for more details.