Skip to content

Issues: PandABlocks/PandABlocks-FPGA

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

39 Open 54 Closed
39 Open 54 Closed
Author
Filter by author
Loading
Label
Filter by label
Loading
Use alt + click/return to exclude labels
or ⇧ + click/return for logical OR
Projects
Filter by project
Loading
Milestones
Filter by milestone
Loading
Assignee
Filter by who’s assigned
Sort
Sort by
Newest Oldest Most commented Least commented Recently updated Least recently updated Best match
Most reactions
👍 👎 😄 🎉 😕 ❤️ 🚀 👀

Issues list

Investigate PCOMP Table module
#219 opened Oct 29, 2024 by tomtrafford
1
Tidy Encoders.vhd
#217 opened Oct 18, 2024 by tomtrafford
Autogenerate assembler functions for bit_bus and pos_bus Introductory issue
#215 opened Oct 7, 2024 by glennchid
@tomtrafford
2
Implement I2C configuration of clock synthesisers
#213 opened Sep 18, 2024 by glennchid
Implement DDMI for SFPs
#212 opened Sep 18, 2024 by glennchid
Fix upload/download artifacts
#210 opened Sep 16, 2024 by glennchid
@tomtrafford
Write PID Controller block
#201 opened Aug 20, 2024 by tomtrafford
Investigate FMC ACQ427 Jitter
#199 opened Aug 1, 2024 by tomtrafford
Test current enDat encoder capabilities Introductory issue
#198 opened Jul 19, 2024 by tomtrafford
@tomtrafford
Write Documentation for using SFP through FMC interface
#193 opened Jun 12, 2024 by tomtrafford
1
@tomtrafford
Investigate using SI5338 for MGT clocking on PandABrick
#180 opened Mar 1, 2024 by glennchid
4
PCAP.TS_START not zeroed when GATE already high at the start of capture bug
#179 opened Feb 29, 2024 by coretl
1
@evalott100 @tomtrafford
9
Send timestamp over SFP via PandA sync enhancement
#175 opened Feb 15, 2024 by coretl
Support for ML model deployment
#166 opened Nov 3, 2023 by marcelldls
2
The us_system block should be defined as a "pure" extension block without any VHDL implementation
#165 opened Nov 1, 2023 by Araneidae
Remove component declarations from VHDL source
#161 opened Sep 21, 2023 by Araneidae
2
EVR: Implement event forwarding on EVR TX
#159 opened Sep 20, 2023 by glennchid
EVR: Vary MGT refclk frquency
#158 opened Sep 20, 2023 by glennchid
Add version number to created devicetree
#154 opened Sep 20, 2023 by tomtrafford
Populate clock_target and clock_actual
#150 opened Sep 11, 2023 by tomtrafford
PandABrick: remove all test code and tidy top level
#149 opened Sep 8, 2023 by glennchid
PandABrick: DCARD mode
#148 opened Sep 8, 2023 by glennchid
PandABrick: tidy up sfp_pand_sync
#147 opened Sep 8, 2023 by glennchid
1
PandABrick: convert verilog file to VHDL
#146 opened Sep 8, 2023 by glennchid
1
PandABrick: tidy up encoders module
#144 opened Sep 8, 2023 by glennchid
ProTip! Exclude everything labeled bug with -label:bug.