Added links in vitepress website

vinitkesh · Jun 6, 2024 · 0abbb26 · 0abbb26
1 parent b9d84a3
commit 0abbb26
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Showing 150 changed files with 10,867 additions and 139 deletions.
diff --git a/docs/.vitepress/config.mjs b/docs/.vitepress/config.mjs
@@ -19,7 +19,22 @@ export default defineConfig({
 			provider: 'local',
 		},
 
-    sidebar: [
+    sidebar: {
+
+      '/MIPS/':[
+        {
+          text: 'MIPS',
+          collapsed: false,
+          items: [
+            { text: 'Introduction', link: '/MIPS/' },
+            { text: 'Registers', link: '/MIPS/Registers' },
+            { text: 'Instructions', link: '/MIPS/Instructions' },
+            { text: 'Examples', link: '/MIPS/Examples' },
+          ]
+
+        }],
+
+      '/':[
       {
         text: 'Examples',
         items: [
@@ -28,6 +43,7 @@ export default defineConfig({
         ]
       }
     ],
+  },
 
     socialLinks: [
       { icon: 'github', link: 'https://github.com/vuejs/vitepress' }

diff --git a/docs/.vitepress/dist/404.html b/docs/.vitepress/dist/404.html
@@ -6,17 +6,17 @@
     <title>404 | Hardware Lab NITC</title>
     <meta name="description" content="Not Found">
     <meta name="generator" content="VitePress v1.2.3">
-    <link rel="preload stylesheet" href="/assets/style.CTsPrQqq.css" as="style">
+    <link rel="preload stylesheet" href="/hwlabnitc.github.io/assets/style.DnghZTc-.css" as="style">
 
-    <script type="module" src="/assets/app.BVAsbgWq.js"></script>
-    <link rel="preload" href="/assets/inter-roman-latin.Di8DUHzh.woff2" as="font" type="font/woff2" crossorigin="">
+    <script type="module" src="/hwlabnitc.github.io/assets/app.BfUHQ1UT.js"></script>
+    <link rel="preload" href="/hwlabnitc.github.io/assets/inter-roman-latin.Di8DUHzh.woff2" as="font" type="font/woff2" crossorigin="">
     <link rel="icon" href="/img/favicon.ico">
     <script id="check-dark-mode">(()=>{const e=localStorage.getItem("vitepress-theme-appearance")||"auto",a=window.matchMedia("(prefers-color-scheme: dark)").matches;(!e||e==="auto"?a:e==="dark")&&document.documentElement.classList.add("dark")})();</script>
     <script id="check-mac-os">document.documentElement.classList.toggle("mac",/Mac|iPhone|iPod|iPad/i.test(navigator.platform));</script>
   </head>
   <body>
     <div id="app"></div>
-    <script>window.__VP_HASH_MAP__=JSON.parse("{\"mips_index.md\":\"CY43yMpU\",\"verilog_main.md\":\"yPPbu8m8\",\"mips_main.md\":\"B6bGXt9J\",\"about.md\":\"CY5iuE6T\",\"index.md\":\"Ccl4vJqT\",\"verilog_index.md\":\"BmIHPG-w\",\"verilog_intro_readme.md\":\"CnTl2NNp\",\"verilog_singlecycle.md\":\"DvYIvDh1\"}");window.__VP_SITE_DATA__=JSON.parse("{\"lang\":\"en-US\",\"dir\":\"ltr\",\"title\":\"Hardware Lab NITC\",\"description\":\"An official hardware lab wesbsite\",\"base\":\"/\",\"head\":[],\"router\":{\"prefetchLinks\":true},\"appearance\":true,\"themeConfig\":{\"outline\":{\"level\":\"deep\"},\"nav\":[{\"text\":\"Home\",\"link\":\"/\"},{\"text\":\"Verilog Guide\",\"link\":\"/Verilog/\"},{\"text\":\"MIPS Guide\",\"link\":\"/MIPS/\"}],\"search\":{\"provider\":\"local\"},\"sidebar\":[{\"text\":\"Examples\",\"items\":[{\"text\":\"Verilog\",\"link\":\"/markdown-examples\"},{\"text\":\"MIPS\",\"link\":\"/api-examples\"}]}],\"socialLinks\":[{\"icon\":\"github\",\"link\":\"https://github.com/vuejs/vitepress\"}],\"footer\":{\"copyright\":\"Copyright © 2024 National Institute of Technology Calicut\"}},\"locales\":{},\"scrollOffset\":134,\"cleanUrls\":false}");</script>
+    <script>window.__VP_HASH_MAP__=JSON.parse("{\"index.md\":\"BiX3HcXP\",\"about.md\":\"Dzg05ABX\",\"verilog_index.md\":\"CgSFKGIP\",\"verilog_main.md\":\"B_DAyBtb\",\"mips_main.md\":\"B6aCW--E\",\"mips_index.md\":\"BShnq2Ay\",\"registers.md\":\"C1Tfb5cq\",\"verilog_intro_readme.md\":\"B7knES9C\",\"fsm.md\":\"BpozOCs2\",\"mips_mips.md\":\"C9wrwHux\",\"verilog_singlecycle.md\":\"7mWeb3Kr\",\"mips.md\":\"D391O4eq\"}");window.__VP_SITE_DATA__=JSON.parse("{\"lang\":\"en-US\",\"dir\":\"ltr\",\"title\":\"Hardware Lab NITC\",\"description\":\"An official hardware lab wesbsite\",\"base\":\"/hwlabnitc.github.io/\",\"head\":[],\"router\":{\"prefetchLinks\":true},\"appearance\":true,\"themeConfig\":{\"outline\":{\"level\":\"deep\"},\"nav\":[{\"text\":\"Home\",\"link\":\"/\"},{\"text\":\"Verilog Guide\",\"link\":\"/Verilog/\"},{\"text\":\"MIPS Guide\",\"link\":\"/MIPS/\"}],\"search\":{\"provider\":\"local\"},\"sidebar\":{\"/MIPS/\":[{\"text\":\"MIPS\",\"collapsed\":false,\"items\":[{\"text\":\"Introduction\",\"link\":\"/MIPS/\"},{\"text\":\"Registers\",\"link\":\"/MIPS/Registers\"},{\"text\":\"Instructions\",\"link\":\"/MIPS/Instructions\"},{\"text\":\"Examples\",\"link\":\"/MIPS/Examples\"}]}],\"/\":[{\"text\":\"Examples\",\"items\":[{\"text\":\"Verilog\",\"link\":\"/markdown-examples\"},{\"text\":\"MIPS\",\"link\":\"/api-examples\"}]}]},\"socialLinks\":[{\"icon\":\"github\",\"link\":\"https://github.com/vuejs/vitepress\"}],\"footer\":{\"copyright\":\"Copyright © 2024 National Institute of Technology Calicut\"}},\"locales\":{},\"scrollOffset\":134,\"cleanUrls\":false}");</script>
 
   </body>
 </html>
diff --git a/docs/.vitepress/dist/MIPS/index.html b/docs/.vitepress/dist/MIPS/index.html
diff --git a/docs/.vitepress/dist/MIPS/mips.html b/docs/.vitepress/dist/MIPS/mips.html
diff --git a/docs/.vitepress/dist/NITC_Logo.png b/docs/.vitepress/dist/NITC_Logo.png
diff --git a/docs/.vitepress/dist/Verilog/Intro/README.html b/docs/.vitepress/dist/Verilog/Intro/README.html
diff --git a/docs/.vitepress/dist/Verilog/SingleCycle.html b/docs/.vitepress/dist/Verilog/SingleCycle.html
diff --git a/docs/.vitepress/dist/Verilog/index.html b/docs/.vitepress/dist/Verilog/index.html