Sky130 - Convert to Pydantic, support sky130_scl

.github/workflows/e2e-cad.yml

@@ -0,0 +1,55 @@
+name: End-to-end CAD flow smoketests
+
+on:
+  push:
+    branches:
+      - main
+      - test-ci
+      - sky130_pydantic
+  pull_request:
+
+jobs:
+  sky130-cm-e2e:
+    runs-on: [self-hosted] # TODO: replace with something centrally admined
+
+    steps:
+        # Clone this repo
+      - name: Checkout
+        uses: actions/[email protected]
+
+      - name: Run syn (Genus), par (Innovus), drc (Pegasus), and lvs (Pegasus) on the GCD design in sky130, using sky130_scl.
+        run: |
+          cd e2e
+          poetry install
+          source $(poetry env info --path)/bin/activate
+          # redirect all hammer output a temp file, since it contains proprietary tool logs
+          tempfile=$(mktemp)
+
+          # run cadence tools on design
+          echo "log file is $tempfile on $(hostname)" | tee -a $tempfile
+          echo "End-to-end CAD flow CI smoketest running on" ${{ github.head_ref }}.${{ github.sha }} > $tempfile 2>&1
+          make build >> $tempfile 2>&1
+          echo "running par.." | tee -a $tempfile
+          make par >> $tempfile 2>&1
+          echo "running drc.." | tee -a $tempfile
+          make drc >> $tempfile 2>&1
+          echo "running lvs.." | tee -a $tempfile
+          make lvs >> $tempfile 2>&1
+
+          # Verify DRC, LVS are clean (this is a very simple design, it should be clean without hacks)
+          echo "Checking that LVS passed..." | tee -a $tempfile
+          # TODO these are probably pretty brittle...
+          if [[ $(grep "Run Result             : MATCH" "$tempfile") ]]; then
+            echo "LVS passed!" | tee -a $tempfile
+          else
+            echo "There's an LVS mismatch! see $tempfile for log" | tee -a $tempfile
+            exit 1
+          fi
+
+          echo "Checking that DRC is clean..." | tee -a $tempfile
+          if [[ $(grep "Total DRC Results                 : 0 (0)" "$tempfile") ]]; then
+            echo "DRC is clean!" | tee -a $tempfile
+          else
+            echo "There are DRC violations! see $tempfile for log" | tee -a $tempfile
+            exit 1
+          fi

doc/Technology/Tech-class.rst

@@ -28,6 +28,7 @@ HammerTechnology Class
 
 The HammerTechnology class is the base class that all technology plugins should inherit from and is defined in ``hammer/tech/__init__.py``. Particularly useful methods are:
 
+* ``gen_config``: the plugin subclass should override this method to generate the tech config. See the next section (:ref:`tech-json`) for details.
 * ``post_install_script``: the plugin subclass should override this method to apply any non-default PDK installation steps or hotfixes in order to set up the technology libraries for use with Hammer.
 * ``read_libs``: this is a particularly powerful method to read the libraries contained in the ``tech.json`` file and filter them using the filters also contained the same file. See the :ref:`filters` section for details.
 * ``get_tech_<action>_hooks``: these methods are necessary if tech--specific hooks are needed, and must return a list of hooks when a given tool name implementing the relevant action is called. Refer to the :ref:`hooks` section for details about how to write hooks. 

e2e/Makefile

@@ -5,7 +5,7 @@ vlsi_dir=$(abspath .)
 # minimal flow configuration variables
 design              ?= pass
 pdk                 ?= sky130
-tools               ?= nop
+tools               ?= cm
 env                 ?= bwrc
 
 extra               ?=  # extra configs
@@ -45,4 +45,4 @@ $(HAMMER_D_MK):
 -include $(HAMMER_D_MK)
 
 clean:
-    rm -rf $(OBJ_DIR) hammer-vlsi-*.log
+	rm -rf $(OBJ_DIR) hammer-vlsi-*.log

e2e/configs-env/bwrc-env.yml

@@ -27,13 +27,26 @@ drc.magic.magic_bin: "/tools/commercial/skywater/local/chipyard-tutorial/.conda-
 lvs.netgen.netgen_bin: "/tools/commercial/skywater/local/chipyard-tutorial/.conda-signoff/bin/netgen"
 
 
-# Sky130 paths
+# Technology paths
 technology.sky130:
-  sky130A: "/tools/commercial/skywater/local/sky130A"
-  sram22_sky130_macros: "/tools/commercial/skywater/local/sram22_sky130_macros"
-  openram_lib: "/tools/commercial/skywater/local/sky130_sram_macros"
-  sky130_nda: "/tools/commercial/skywater/swtech130/skywater-src-nda-20221031"
-  sky130_cds: "/tools/commercial/skywater/sky130_cds/sky130_prelim_release_091123"
+  #sky130A: "/tools/commercial/skywater/local/open_pdks-2022.10/share/pdk/sky130A"
+  # sram22_sky130_macros: "/tools/commercial/skywater/local/chipyard-tutorial/sram22_sky130_macros"
+  sram22_sky130_macros: "/tools/C/rohankumar/stac-top/vlsi/sram22_sky130_macros/"
+  # https://github.com/rahulk29/sram22_sky130_macros/tree/dev
+
+  # this key is OPTIONAL, no NDA files will be used if it does not point to a valid path
+  #sky130_nda: "/tools/commercial/skywater/swtech130/skywater-src-nda"
+
+  # for caravel collateral pulled in by this design
+  caravel: /tools/commercial/skywater/local/caravel/v6.0
+
+  lvs_blackbox_srams: true
+  sky130_scl: "/tools/C/elamdf/sky130/sky130_scl_9T_0.0.6"
+  sky130_cds: "/tools/C/elamdf/sky130/sky130_release_0.0.4/"
+  stdcell_library: "sky130_scl"
+
+technology.core.stackup: "sky130_scl"
+vlsi.technology.placement_site: "CoreSite"
 
 # ASAP7 paths
 technology.asap7:

e2e/configs-tool/cm.yml

@@ -9,5 +9,5 @@ vlsi.core.sim_tool: "hammer.sim.vcs"
 vlsi.core.timing_tool: "hammer.timing.tempus"
 vlsi.core.formal_tool: "hammer.formal.conformal"
 vlsi.core.power_tool: "hammer.power.voltus"
-vlsi.core.drc_tool: "hammer.drc.calibre"
-vlsi.core.lvs_tool: "hammer.lvs.calibre"
+vlsi.core.drc_tool: "hammer.drc.pegasus"
+vlsi.core.lvs_tool: "hammer.lvs.pegasus"

e2e/pdks/sky130-bwrc.yml

@@ -5,8 +5,10 @@ technology.sky130:
   openram_lib: "/tools/commercial/skywater/local/sky130_sram_macros"
   sky130_nda: "/tools/commercial/skywater/swtech130/skywater-src-nda-20221031"
   sky130_cds: "/tools/commercial/skywater/sky130_cds/sky130_prelim_release_091123"
+  sky130_cds: "/tools/commercial/skywater/sky130_cds/PDK/sky130_release_0.0.3/"
+  sky130_scl: "/tools/commercial/skywater/sky130_cds/LIB/sky130_scl_9T_0.0.3/"
 
-synthesis.genus.version: "211"
+synthesis.genus.version: "221"
 par.innovus.version: "211"
 
 sim.vcs.version: "S-2021.09-SP1-1"

e2e/pyproject.toml

@@ -10,7 +10,7 @@ repository = "https://github.com/ucb-bar/hammer"
 [tool.poetry.dependencies]
 python = "^3.9"
 hammer-vlsi = {path = "../.", extras = ["asap7"], develop = true}
-hammer-mentor-plugins = {path = "hammer-mentor-plugins", develop = true}
+#hammer-mentor-plugins = {path = "hammer-mentor-plugins", develop = true}
 
 [build-system]
 requires = ["poetry-core>=1.0.8", "setuptools>=65.3"]

hammer/drc/pegasus/__init__.py

@@ -30,7 +30,9 @@ def empty_step(self) -> bool:
 
     @property
     def steps(self) -> List[HammerToolStep]:
-        steps = [self.generate_drc_ctl_file]  # TODO: DRC steps require multiple runs of the tool how do we support this?
+        steps = [
+            self.generate_drc_ctl_file
+        ]  # TODO: DRC steps require multiple runs of the tool how do we support this?
         return self.make_steps_from_methods(steps)
 
     def do_post_steps(self) -> bool:
@@ -50,17 +52,22 @@ def run_pegasus(self) -> bool:
         args = [
             pegasus_bin,
             "-drc",  # DRC mode
-            "-dp", str(self.get_setting("vlsi.core.max_threads")),
+            "-dp",
+            str(self.get_setting("vlsi.core.max_threads")),
             "-license_dp_continue",  # don't quit if requested dp license not available
-            "-control", self.drc_ctl_file,
-            "-log_dir", f"{self.top_module}_logs",
-            "-ui_data"  # for results viewer
+            "-control",
+            self.drc_ctl_file,
+            "-log_dir",
+            f"{self.top_module}_logs",
+            "-ui_data",  # for results viewer
             # TODO: -interactive for block level
-            ] + rules
+        ] + rules
 
         HammerVLSILogging.enable_colour = False
         HammerVLSILogging.enable_tag = False
-        self.run_executable(args, cwd=self.run_dir)  # TODO: check for errors and deal with them
+        self.run_executable(
+            args, cwd=self.run_dir
+        )  # TODO: check for errors and deal with them
         HammerVLSILogging.enable_colour = True
         HammerVLSILogging.enable_tag = True
 
@@ -72,31 +79,43 @@ def run_pegasus(self) -> bool:
 
         technology = self.get_setting("vlsi.core.technology").split(".")[-1]
         with open(self.view_drc_script, "w") as f:
-            f.write(textwrap.dedent(f"""
+            f.write(
+                textwrap.dedent(
+                    f"""
         cd {self.run_dir}
         source ./enter
         {pegasus_bin}DesignReview -qrv -tech {technology} -data {self.layout_file} -post {self.dr_rv_macro} -verbose
-        """))
+        """
+                )
+            )
         os.chmod(self.view_drc_script, 0o755)
 
         with open(self.dr_rv_macro, "w") as f:
-            f.write(textwrap.dedent(f'''
+            f.write(
+                textwrap.dedent(
+                    f"""
         PVS::invoke_pvsrv("{self.run_dir}");
-        '''))
+        """
+                )
+            )
 
         return True
 
     def generate_drc_ctl_file(self) -> bool:
-        """ Generate the DRC control file self.drc_ctl_file and fill its contents """
+        """Generate the DRC control file self.drc_ctl_file and fill its contents"""
         with open(self.drc_ctl_file, "w") as f:
-            f.write(self.header.replace("#","//"))
-            f.write(textwrap.dedent(f'''
+            f.write(self.header.replace("#", "//"))
+            f.write(
+                textwrap.dedent(
+                    f"""
             virtual_connect -report yes;
             layout_path "{self.layout_file}";
             layout_primary {self.top_module};
             results_db -drc "{self.drc_results_db}" -ascii;
             report_summary -drc "{self.drc_results_file}" -replace;
-            '''))
+            """
+                )
+            )
             f.write(self.get_additional_drc_text())
         return True
 
@@ -132,10 +151,14 @@ def env_vars(self) -> Dict[str, str]:
         """
         v = dict(super().env_vars)
         v["PEGASUS_BIN"] = self.get_setting("drc.pegasus.pegasus_bin")
+        v["PEGASUS_DRC"] = os.path.join(
+            self.get_setting("technology.sky130.sky130_cds"), "Sky130_DRC"
+        )
         return v
 
     @property
     def post_synth_sdc(self) -> Optional[str]:
         pass
 
+
 tool = PegasusDRC

hammer/par/openroad/__init__.py

@@ -1448,7 +1448,9 @@ def write_gds(self) -> str:
             ilm_gds = list(map(lambda ilm: ilm.gds, self.get_input_ilms()))
             gds_files.extend(ilm_gds)
 
-        layer_map_file=self.get_setting('par.inputs.gds_map_file')
+        layer_map_file=self.get_gds_map_file()
+        if layer_map_file is None:
+            raise FileNotFoundError(f"Must have GDS layer map for write_gds! KLayout won't be able to write GDS file. ({layer_map_file}")
 
         # the first entry of $KLAYOUT_PATH will be the one where the configuration is stored when KLayout exits
         #   otherwise KLayout tries to write everything to the same directory as the klayout binary and throws an error if it is not writeable

hammer/synthesis/genus/__init__.py

@@ -198,6 +198,8 @@ def init_environment(self) -> bool:
             verbose_append("set_db lp_clock_gating_prefix  {CLKGATE}")
             verbose_append("set_db lp_insert_clock_gating  true")
             verbose_append("set_db lp_clock_gating_register_aware true")
+        else:
+            verbose_append("set_db lp_clock_gating_infer_enable false")
 
         # Set up libraries.
         # Read timing libraries.

hammer/tech/__init__.py

@@ -322,6 +322,73 @@ def ensure_dirs_exist(self, path) -> None:
             self.logger.info('Creating directory: {}'.format(dir_name))
             os.makedirs(dir_name)
 
+    def override_tech_libraries(self) -> None:
+        """
+        Override library paths to cached or manually overriden tech collateral
+        """
+        if not self.config.libraries:
+            return
+
+        tech_module: str = self.get_setting("vlsi.core.technology")
+        tech_name = tech_module.split('.')[-1]
+        manual_overrides = {}
+
+        # if user has broken glass, map tech filename -> manual path
+        if self.get_setting("vlsi.technology.manually_override_pdk_collateral"):
+            for lib in self.get_setting("vlsi.technology.override_libraries"):
+                for key, path in lib['library'].items():
+                    fname = os.path.basename(path)
+                    if (key, fname) in manual_overrides:
+                        self.logger.error("Attempted to add {(key,path)} to overrides when {manual_overrides[(key, fname)]} already exists!")
+                    manual_overrides[(key, fname)] = path
+        else:
+            if len(self.get_setting("vlsi.technology.override_libraries")) > 0:
+                self.logger.warning("You've attempted to specify override libraries without enabling vlsi.technology.manually_override_pdk_collateral! collateral paths will not be overwritten")
+
+        used_overrides = []
+        for lib in self.config.libraries:
+            for field_name in lib.model_fields:
+                if field_name.endswith("_file") or field_name == "verilog_sim":
+                    # check if that file exists in cache, override if so
+                    default_path = getattr(lib, field_name)
+                    if not default_path:
+                        continue
+                    new_path = default_path
+                    fname = os.path.basename(default_path)
+                    fnames = [fname, fname.replace(".spice", ".cdl"), fname.replace(".cdl", ".spice")]
+
+                    cached_paths = set(os.path.join(self.cache_dir, f) for f in fnames)
+                    cached_paths = [f for f in cached_paths if os.path.exists(f)]
+
+                    # only allow 1 valid cached path, otherwise ambiguous
+                    if len(cached_paths) > 1:
+                        self.logger.error(f"ambiguous cache override: {cached_paths}")
+                    if cached_paths:
+                        used_overrides.append((field_name, fname))
+                        new_path = cached_paths[0]
+                        self.logger.info(
+                            f"overriding {default_path} with cache entry {new_path}"
+                        )
+
+                    manual_override_paths = set([f for f in fnames if (field_name, f) in manual_overrides])
+                    manual_override_paths = [manual_overrides[(field_name, f)] for f in manual_override_paths]
+
+                    # only allow 1 valid manual_override path, otherwise ambiguous
+                    if len(manual_override_paths) > 1:
+                        self.logger.error(f"ambiguous cache override: {manual_override_paths}")
+                    # prioritize manual overrides over cache
+                    if manual_override_paths:
+                        used_overrides.append((field_name, fname))
+                        new_path = manual_override_paths[0]
+                        self.logger.info(
+                            f"overriding {default_path} with manual override {new_path}"
+                        )
+
+                    setattr(lib, field_name, new_path)
+        unused_overrides = [k for k in manual_overrides.keys() if k not in used_overrides]
+        if unused_overrides:
+            self.logger.warning(f"Unused tech collateral overrides: {unused_overrides}")
+
     # hammer-vlsi properties.
     # TODO: deduplicate/put these into an interface to share with HammerTool?
     @property
@@ -353,8 +420,12 @@ def __init__(self):
         self.time_unit: Optional[str] = None
         self.cap_unit: Optional[str] = None
 
+    def gen_config(self) -> None:
+        """For subclasses to set self.config (type: TechJSON) directly, instead of from static JSON file"""
+        pass
+
     @classmethod
-    def load_from_module(cls, tech_module: str) -> Optional["HammerTechnology"]:
+    def load_from_module(cls, tech_module: str) -> "HammerTechnology":
         """Load a technology from a given module.
 
         :param tech_module: Technology module (e.g. "hammer.technology.asap7")
@@ -375,8 +446,8 @@ def load_from_module(cls, tech_module: str) -> Optional["HammerTechnology"]:
         elif tech_yaml.is_file():
             tech.config = TechJSON.model_validate_json(json.dumps(load_yaml(tech_yaml.read_text())))
             return tech
-        else: #TODO - from Pydantic model instance
-            return None
+        else: # Assume tech implents gen_config()
+            return tech
 
     def get_lib_units(self) -> None:
         """
@@ -415,6 +486,12 @@ def get_setting(self, key: str) -> Any:
             print(e)  # TODO: fix the root cause
             return None
 
+    def set_setting(self, key: str, value: Any) -> None:
+        """
+        Set a runtime setting in the database.
+        """
+        self._database.set_setting(key, value)
+
     def get_setting_suffix(self, key: str) -> Any:
         """Get a particular setting from the database with a suffix.
         """
@@ -648,15 +725,15 @@ def prepend_dir_path(self, path: str, lib: Optional[Library] = None) -> str:
 
         1. Absolute path: the path starts with "/" and refers to an absolute path on the filesystem
             /path/to/a/lib/file.lib -> /path/to/a/lib/file.lib
-        2. Tech plugin relative path: the path has no "/"s and refers to a file directly inside the tech plugin folder
+        2. Tech plugin relative path: the path has no "/"s and refers to a file directly inside the tech plugin folder (no subdirectories allowed, else it conflicts with 3-5. below!)
             techlib.lib -> <tech plugin package>/techlib.lib
-        3. Tech cache relative path: the path starts with an identifier which is "cache" (this is used in the SKY130 tech JSON)
+        3. Tech cache relative path: the path starts with an identifier which is "cache" (this is used in the SKY130 Libraries)
             cache/primitives.v -> <tech plugin cache dir>/primitives.v
         4. Install relative path: the path starts with an install/tarball identifier (installs.id, tarballs.root.id)
         and refers to a file relative to that identifier's path
             pdkroot/dac/dac.lib -> /nfs/ecad/tsmc100/stdcells/dac/dac.lib
         5. Library extra_prefix path: the path starts with an identifier present in the provided
-            library's extra_prefixes
+            library's extra_prefixes Field
             lib1/cap150f.lib -> /design_files/caps/cap150f.lib
         """
         assert len(path) > 0, "path must not be empty"