Merge latest changes

examples/cfg/filter.yml

@@ -2,11 +2,13 @@
 filter:
   sets:
     # keep: [XCoreVAlu]
-    drop: [RISCVBase, RISCVEncoding, Zicsr, Zifencei, RVSMode, RVDebug, RV32I, RVNMode, XCoreVSimd]
+    # drop: [RISCVBase, RISCVEncoding, Zicsr, Zifencei, RVSMode, RVDebug, RV32I, RVNMode, XCoreVSimd]
+    drop: [RISCVBase, RISCVEncoding, Zicsr, Zifencei, RVSMode, RVDebug, RV32I, RVNMode]
+    # drop: [RISCVBase, RISCVEncoding, Zicsr, Zifencei, RVSMode, RVDebug, RV32I, RVNMode, RV32Zpsfoperand]
   instructions:
-    # keep: [CV_ABS, CV_ADD_B]
+    keep: [CV_ABS, CV_ADD_B]
     drop: [CV_CLIPU, CV_CLIPR, CV_CLIPUR]
   opcodes:
-    keep: [custom-0, custom-1, custom-2 ,custom-3, 0b00000]
+    keep: [custom-0, custom-1, custom-2 ,custom-3, 0b00000, OP-P, OP]
   encoding_sizes:
     keep: [32]

examples/cfg/patches.yml

@@ -15,7 +15,9 @@ patches:
     # file: gitlab_ci.patch
     # file: llvm/gitlab_ci.patch
     # file: /absolute/path/to/gitlab_ci.patch
-  - name: insert_markers_llvm17
+  # - name: insert_markers_llvm17
+  - name: insert_markers_llvm18
+  # TODO:  automatially select patch depending on llvm version
   # generated patch (TODO: implement)
   # - name: ???
   #   target: llvm

examples/cfg/riscv.yml

@@ -0,0 +1,76 @@
+---
+riscv:
+  xlen: 32
+  features:
+  - m
+  - fast-unaligned-access
+  legalization:
+    gisel:
+      ops:
+      # TODO: simd shift?
+      # TODO: rotate left/right?
+      - name: [G_SMAX, G_UMAX, G_SMIN, G_UMIN, G_ABS]
+        types: [s32]
+        onlyif: [HasVendorXCVAlu]
+      - name: [G_ADD, G_SUB, G_AND, G_OR, G_XOR, G_ASHR, G_LSHR, G_SHL]
+        types: [v4i8, v2i16]
+        onlyif: [HasVendorXCVSimd]
+      - name: G_INSERT_VECTOR_ELT
+        types: [v4i8, v2i16]
+        onlyif: [HasVendorXCVSimd]
+      # - name: [G_ADD]
+      #   types: [v4i8, v2i16]
+      #   onlyif: [HasExtmyextsimd]
+      # - name: [G_ADD]
+      #   types: [s16, s32]
+      #   onlyif: [HasExtmyextalu]
+      # - name: [G_ADD, G_SMAX]
+      #   types: [v4i8, v2i16]
+      #   onlyif: [HasExtRV32Zpn]
+      # - name: [G_SHL, G_SMIN, G_SUB]
+      #   types: [v4i8]
+      #   onlyif: [HasExtRV32Zpn]
+      # - name: [G_SMIN, G_SMAX]  # TODO: CLZ, REV, CMIX
+      #   types: [s32]
+      #   onlyif: [HasExtRV32Zbpo]
+      # # TODO: RV32Zpsfoperand (register pairs)
+      # TODO: G_BITCAST
+  transform_info:
+    shouldFoldTerminatingConditionAfterLSR: true
+    prefersVectorizedAddressing: false
+    enableInterleavedAccessVectorization: true
+    enableMaskedInterleavedAccessVectorization: null
+    enableScalableVectorization: false
+    preferEpilogueVectorization: null
+    supportsScalableVectors: false
+    # getInliningThresholdMultiplier: ?
+    # getInliningCostBenefitAnalysisSavingsMultiplier: ?
+    # getInliningCostBenefitAnalysisProfitableMultiplier: ?
+    # getInlinerVectorBonusPercent: ?
+    # getFlatAddressSpace: ?
+    # getMinVectorRegisterBitWidth: ?
+    # getCacheLineSize: ?
+    # getPrefetchDistance: ?
+    # getMaxPrefetchIterationsAhead: ?
+    # getMaxMemIntrinsicInlineSizeThreshold: ?
+    # getAtomicMemIntrinsicMaxElementSize: ?
+    # getMaxNumArgs: ?
+    # getGISelRematGlobalCost: ?
+    # getMinTripCountTailFoldingThreshold: ?
+    # getMaxVScale: ?
+    # getVScaleForTuning: ?
+    # getPredictableBranchThreshold: ?
+    # isSingleThreaded: ?
+    # isNumRegsMajorCostOfLSR: ?
+    # canMacroFuseCmp: ?
+    # enableOrderedReductions: ?
+    # LSRWithInstrQueries: ?
+    # useAA: ?
+    # shouldBuildLookupTables: ?
+    # shouldBuildRelLookupTables: ?
+    # supportsEfficientVectorElementLoadStore: ?
+    # supportsTailCalls: ?
+    # enableSelectOptimize: ?
+    # isFPVectorizationPotentiallyUnsafe: ?
+    # isVScaleKnownToBeAPowerOfTwo: ?
+    # enableWritePrefetching: ?

examples/cfg/tests.yml

@@ -0,0 +1,5 @@
+---
+test:
+  paths: []
+  # - MC/RISCV
+  #   - CodeGen/RISCV

examples/demo.py

@@ -42,20 +42,15 @@
 seal5_flow.initialize(
     clone=True,
     clone_url="https://github.com/llvm/llvm-project.git",
-    clone_ref="llvmorg-17.0.6",
+    # clone_ref="llvmorg-17.0.6",
+    clone_ref="llvmorg-18.1.0-rc3",
     force=True,
     verbose=VERBOSE,
 )
 
 # Optional: clean existing settings/models for fresh run
 seal5_flow.reset(settings=True, interactive=False)
 
-# Clone Seal5 dependencies
-# 1. M2-ISA-R (frontend only)
-# 2. CDSL2LLVM (later)
-# TODO: refresh refs
-seal5_flow.setup(force=True, verbose=VERBOSE)
-
 # Load CoreDSL inputs
 cdsl_files = [
     # XCOREV
@@ -66,6 +61,7 @@
     EXAMPLES_DIR / "cdsl" / "rv_xcorev" / "XCoreVMem.core_desc",
     EXAMPLES_DIR / "cdsl" / "rv_xcorev" / "XCoreVBranchImmediate.core_desc",
     # RVP (will not work)
+    EXAMPLES_DIR / "cdsl" / "RV32P.core_desc",
     # EXAMPLES_DIR / "cdsl" / "RVP.core_desc",
     # S4E (untested) -> undefined XLEN
     # EXAMPLES_DIR / "cdsl" / "rv_s4e" / "s4e-mac.core_desc",
@@ -78,6 +74,12 @@
 ]
 seal5_flow.load(cdsl_files, verbose=VERBOSE, overwrite=True)
 
+# Load test inputs
+test_files = [
+    EXAMPLES_DIR / "tests" / "xcorev" / "cv_abs.test.c",
+]
+seal5_flow.load(test_files, verbose=VERBOSE, overwrite=True)
+
 # Load YAML inputs
 cfg_files = [
     # XCOREV
@@ -94,25 +96,51 @@
     EXAMPLES_DIR / "cfg" / "llvm.yml",
     EXAMPLES_DIR / "cfg" / "filter.yml",
     EXAMPLES_DIR / "cfg" / "patches.yml",
+    EXAMPLES_DIR / "cfg" / "riscv.yml",
+    EXAMPLES_DIR / "cfg" / "tests.yml",
     EXAMPLES_DIR / "cfg" / "git.yml",
 ]
 seal5_flow.load(cfg_files, verbose=VERBOSE, overwrite=False)
 
+# Clone & install Seal5 dependencies
+# 1. CDSL2LLVM (add PHASE_0 patches)
+seal5_flow.setup(force=True, verbose=VERBOSE)
+
 # Apply initial patches
 seal5_flow.patch(verbose=VERBOSE, stages=[PatchStage.PHASE_0])
 
 if not FAST:
     # Build initial LLVM
     seal5_flow.build(verbose=VERBOSE, config="release")
+else:
+    pass
+    # Build PatternGen & llc
+    # seal5_flow.build(verbose=VERBOSE, config="release", target="pattern-gen")
+    # seal5_flow.build(verbose=VERBOSE, config="release", target="llc")
 
 # Transform inputs
 #   1. Create M2-ISA-R metamodel
 #   2. Convert to Seal5 metamodel (including aliases, builtins,...)
 #   3. Analyse/optimize instructions
 seal5_flow.transform(verbose=VERBOSE)
 
-# Generate patches
-seal5_flow.generate(verbose=VERBOSE)
+# Generate patches (except Patterns)
+seal5_flow.generate(verbose=VERBOSE, skip=["pattern_gen"])
+
+# Apply next patches
+seal5_flow.patch(verbose=VERBOSE, stages=[PatchStage.PHASE_1, PatchStage.PHASE_2])
+
+if not FAST:
+    # Build patch LLVM
+    seal5_flow.build(verbose=VERBOSE, config="release")
+else:
+    # Rebuilt PatternGen & llc
+    seal5_flow.build(verbose=VERBOSE, config="release", target="pattern-gen")
+    seal5_flow.build(verbose=VERBOSE, config="release", target="llc")
+
+# Generate remaining patches
+seal5_flow.generate(verbose=VERBOSE, only=["pattern_gen"])
+
 
 # Apply patches
 seal5_flow.patch(verbose=VERBOSE)

examples/tests/xcorev/cv_abs.test.c

@@ -0,0 +1,9 @@
+// RUN: %clang --target=riscv32 -march=rv32ixs4emac -c -o %t.o %s
+// RUN: llvm-objdump --disassembler-options=numeric -d %t.o | FileCheck %s
+
+int main() {
+  // CHECK: 0b 90 1a 01 cv.abs x1, x2
+  asm("cv.abs x1, x2");
+
+  return 0;
+}

examples/tests/xcorev/cv_mac.test.c

@@ -0,0 +1,9 @@
+// RUN: %clang --target=riscv32 -march=rv32ixs4emac -c -o %t.o %s
+// RUN: llvm-objdump --disassembler-options=numeric -d %t.o | FileCheck %s
+
+int main() {
+  // CHECK: 0b 90 1a 01 cv.mac x1, x2, x3
+  asm("cv.mac x1, x2, x3");
+
+  return 0;
+}

seal5/backends/llvmir/writer.py

@@ -116,7 +116,12 @@ def main():
                 install_dir = pathlib.Path(install_dir)
                 try:
                     cdsl2llvm.run_pattern_gen(
-                        install_dir / "llvm" / "build", input_file, output_file, skip_patterns=True, skip_formats=True
+                        # install_dir / "llvm" / "build",
+                        install_dir,
+                        input_file,
+                        output_file,
+                        skip_patterns=True,
+                        skip_formats=True
                     )
                     metrics["n_success"] += 1
                 except AssertionError:

seal5/backends/patterngen/writer.py

@@ -90,9 +90,20 @@ def main():
     # print("model", model)
     artifacts = {}
     artifacts[None] = []  # used for global artifacts
+    settings = model.get("settings", None)
     if args.splitted:
         # errs = []
         model_includes = []
+        default_mattr = "+m,+fast-unaligned-access"
+        if settings:
+            riscv_settings = settings.riscv
+            if riscv_settings:
+                features = riscv_settings.features
+                if features is None:
+                    pass
+                else:
+                    default_mattr = ",".join([f"+{f}" for f in features])
+
         assert out_path.is_dir(), "Expecting output directory when using --splitted"
         for set_name, set_def in model["sets"].items():
             artifacts[set_name] = []
@@ -125,19 +136,26 @@ def main():
                 output_file = set_dir / out_name
                 output_file_fmt = set_dir / out_name_fmt
                 install_dir = os.getenv("CDSL2LLVM_DIR", None)
-                ext = None
+                predicate = None
+                mattr = default_mattr
                 if ext_settings is not None:
-                    ext = ext_settings.get_predicate(name=set_name)
+                    predicate = ext_settings.get_predicate(name=set_name)
+                    arch_ = ext_settings.get_arch(name=set_name)
+                    mattr = ",".join([*mattr.split(","), f"+{arch_}"])
+
                 assert install_dir is not None
                 install_dir = pathlib.Path(install_dir)
                 try:
                     cdsl2llvm.run_pattern_gen(
-                        install_dir / "llvm" / "build",
+                        # install_dir / "llvm" / "build",
+                        install_dir,
                         input_file,
                         output_file,
                         skip_patterns=False,
                         skip_formats=not args.formats,
-                        ext=ext,
+                        ext=predicate,
+                        mattr=mattr,
+
                     )
                     if output_file.is_file():
                         metrics["n_success"] += 1