Added missing text.

Added text regarding CONTEXT bit in hstateen0.

src/smstateen.adoc

@@ -257,8 +257,9 @@ The JVT bit controls access to the JVT CSR provided by the Zcmt extension.
 ], config: {bits: 64, lanes: 4, hspace:1024}}
 ....
 
-The C, FCSR, and the JVT bits control access to the same state as
-controllled by the same bits in sstateen0 CSR.
+The C bit controls access to any and all custom state. The FCSR and the JVT
+bits control access to the same state as controlled by the same bits in the
+sstateen0 CSR.
 
 The SE0 bit in mstateen0 controls access to the hstateen0, hstateen0h,
 and the sstateen0 CSRs.
@@ -324,6 +325,9 @@ Ssaia extension and is not controlled by either the CSRIND or the IMSIC
 bits of hstateen0.
 ====
 
+The CONTEXT bit in hstateen0 controls access to the scontext CSR
+provided by the Sdtrig ISA extension.
+
 === Usage
 
 After the writable bits of the machine-level `mstateen` CSRs are initialized to