Adding Ved's fixes.

Adding Ved's fixes as per comments in GH.

src/smstateen.adoc

@@ -235,7 +235,7 @@ instruction trap, if relevant), as though they all access fcsr, regardless of
 whether they really do.
 ====
 
-The JVT controls access to the JVT CSR provided by the Zcmt extension.
+The JVT bit controls access to the JVT CSR provided by the Zcmt extension.
 
 === Machine State Enable Register (mstateen0)
 
@@ -301,8 +301,9 @@ Privileged Specification Version 1.13.
 ], config: {bits: 64, lanes: 4, hspace:1024}}
 ....
 
-The C, FCSR, and the JVT bits control access to the
-same state as controllled by the same bits in sstateen0 CSR.
+The C bit controls access to any and all custom state. The FCSR and the JVT
+bits control access to the same state as controlled by the same bits in the
+sstateen0 CSR.
 
 The SE0 bit in hstateen0 controls access to the sstateen0 CSR.