Bump M/S versions in chapter titles

riscv · Feb 12, 2024 · c80ecad · c80ecad
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diff --git a/src/machine.adoc b/src/machine.adoc
@@ -1,5 +1,5 @@
 [[machine]]
-== Machine-Level ISA, Version 1.12
+== Machine-Level ISA, Version 1.13
 
 This chapter describes the machine-level operations available in
 machine-mode (M-mode), which is the highest privilege mode in a RISC-V

diff --git a/src/supervisor.adoc b/src/supervisor.adoc
@@ -1,5 +1,5 @@
 [[supervisor]]
-== Supervisor-Level ISA, Version 1.12
+== Supervisor-Level ISA, Version 1.13
 
 This chapter describes the RISC-V supervisor-level architecture, which
 contains a common core that is used with various supervisor-level