Incorporate mie/mip aspect of Sscofpmf

src/images/bytefield/miereg-standard.adoc

@@ -6,10 +6,10 @@
 (def left-margin 100)
 (def right-margin 100)
 (def boxes-per-row 16)
-(draw-column-headers {:labels (reverse ["0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" "12" "" "" "15"])})
+(draw-column-headers {:labels (reverse ["0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" "12" "13" "14" "15"])})
 
-(draw-box "0" {:span 4})
-(draw-box "MEIE" {:span 1})
+(draw-box "0" {:span 2})
+(draw-box (text "LCOFIE" {:font-size 10}) {:span 1})
 (draw-box "0" {:span 1})
 (draw-box "SEIE" {:span 1})
 (draw-box "0" {:span 1})
@@ -22,7 +22,7 @@
 (draw-box "SSIE" {:span 1})
 (draw-box "0" {:span 1})
 
-(draw-box "4" {:span 4 :borders {}})
+(draw-box "2" {:span 2 :borders {}})
 (draw-box "1" {:span 1 :borders {}})
 (draw-box "1" {:span 1 :borders {}})
 (draw-box "1" {:span 1 :borders {}})
@@ -35,4 +35,5 @@
 (draw-box "1" {:span 1 :borders {}})
 (draw-box "1" {:span 1 :borders {}})
 (draw-box "1" {:span 1 :borders {}})
-----
+(draw-box "1" {:span 1 :borders {}})
+----

src/images/bytefield/mipreg-standard.adoc

@@ -6,9 +6,11 @@
 (def left-margin 100)
 (def right-margin 100)
 (def boxes-per-row 16)
-(draw-column-headers {:labels (reverse ["0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" "12" "" "" "15"])})
+(draw-column-headers {:labels (reverse ["0" "1" "2" "3" "4" "5" "6" "7" "8" "9" "10" "11" "12" "13" "14" "15"])})
 
-(draw-box "0" {:span 4})
+(draw-box "0" {:span 2})
+(draw-box (text "LCOFIP" {:font-size 10}) {:span 1})
+(draw-box "0" {:span 1})
 (draw-box "MEIP" {:span 1})
 (draw-box "0" {:span 1})
 (draw-box "SEIP" {:span 1})
@@ -22,7 +24,8 @@
 (draw-box "SSIP" {:span 1})
 (draw-box "0" {:span 1})
 
-(draw-box "4" {:span 4 :borders {}})
+(draw-box "2" {:span 2 :borders {}})
+(draw-box "1" {:span 1 :borders {}})
 (draw-box "1" {:span 1 :borders {}})
 (draw-box "1" {:span 1 :borders {}})
 (draw-box "1" {:span 1 :borders {}})
@@ -35,4 +38,5 @@
 (draw-box "1" {:span 1 :borders {}})
 (draw-box "1" {:span 1 :borders {}})
 (draw-box "1" {:span 1 :borders {}})
-----
+(draw-box "1" {:span 1 :borders {}})
+----

src/images/bytefield/siereg-standard.edn

@@ -8,8 +8,11 @@
 (def boxes-per-row 32)
 
 (draw-box nil {:span 7 :borders {}})
-(draw-box "15" {:span 3 :text-anchor "start" :borders {}})
-(draw-box "10" {:span 3 :text-anchor "end" :borders {}})
+(draw-box "15" {:text-anchor "start" :borders {}})
+(draw-box "14" {:text-anchor "end" :borders {}})
+(draw-box "13" {:span 2 :borders {}})
+(draw-box "12" {:text-anchor "start" :borders {}})
+(draw-box "10" {:text-anchor "end" :borders {}})
 (draw-box "9" {:span 2 :borders {}})
 (draw-box "8" {:text-anchor "start" :borders {}})
 (draw-box "6" {:text-anchor "end" :borders {}})
@@ -21,7 +24,9 @@
 (draw-box nil {:span 8 :borders {}})
 
 (draw-box nil {:span 7 :borders {}})
-(draw-box "0" {:span 6})
+(draw-box "0" {:span 2})
+(draw-box (text "LCOFIE" {:font-size 20}) {:span 2})
+(draw-box "0" {:span 2})
 (draw-box "SEIE" {:span 2})
 (draw-box "0" {:span 2})
 (draw-box "STIE" {:span 2})
@@ -31,12 +36,14 @@
 (draw-box nil {:span 8 :borders {}})
 
 (draw-box nil {:span 7 :borders {}})
-(draw-box "6" {:span 6 :borders {}})
+(draw-box "2" {:span 2 :borders {}})
+(draw-box "1" {:span 2 :borders {}})
+(draw-box "3" {:span 2 :borders {}})
 (draw-box "1" {:span 2 :borders {}})
 (draw-box "3" {:span 2 :borders {}})
 (draw-box "1" {:span 2 :borders {}})
 (draw-box "3" {:span 2 :borders {}})
 (draw-box "1" {:span 2 :borders {}})
 (draw-box "1" {:borders {}})
 (draw-box nil {:span 8 :borders {}})
-----
+----

src/images/bytefield/sipreg-standard.edn

@@ -8,8 +8,11 @@
 (def boxes-per-row 32)
 
 (draw-box nil {:span 7 :borders {}})
-(draw-box "15" {:span 3 :text-anchor "start" :borders {}})
-(draw-box "10" {:span 3 :text-anchor "end" :borders {}})
+(draw-box "15" {:text-anchor "start" :borders {}})
+(draw-box "14" {:text-anchor "end" :borders {}})
+(draw-box "13" {:span 2 :borders {}})
+(draw-box "12" {:text-anchor "start" :borders {}})
+(draw-box "10" {:text-anchor "end" :borders {}})
 (draw-box "9" {:span 2 :borders {}})
 (draw-box "8" {:text-anchor "start" :borders {}})
 (draw-box "6" {:text-anchor "end" :borders {}})
@@ -21,7 +24,9 @@
 (draw-box nil {:span 8 :borders {}})
 
 (draw-box nil {:span 7 :borders {}})
-(draw-box "0" {:span 6})
+(draw-box "0" {:span 2})
+(draw-box (text "LCOFIP" {:font-size 20}) {:span 2})
+(draw-box "0" {:span 2})
 (draw-box "SEIP" {:span 2})
 (draw-box "0" {:span 2})
 (draw-box "STIP" {:span 2})
@@ -31,12 +36,14 @@
 (draw-box nil {:span 8 :borders {}})
 
 (draw-box nil {:span 7 :borders {}})
-(draw-box "6" {:span 6 :borders {}})
+(draw-box "2" {:span 2 :borders {}})
+(draw-box "1" {:span 2 :borders {}})
+(draw-box "3" {:span 2 :borders {}})
 (draw-box "1" {:span 2 :borders {}})
 (draw-box "3" {:span 2 :borders {}})
 (draw-box "1" {:span 2 :borders {}})
 (draw-box "3" {:span 2 :borders {}})
 (draw-box "1" {:span 2 :borders {}})
 (draw-box "1" {:borders {}})
 (draw-box nil {:span 8 :borders {}})
-----
+----

src/machine.adoc

@@ -1357,8 +1357,17 @@ the interrupt-pending and interrupt-enable bits for supervisor-level
 software interrupts. SSIP is writable in `mip` and may also be set to 1
 by a platform-specific interrupt controller.
 
+If the Sscofpmf extension is implemented, bits `mip`.LCOFIP and `mie`.LCOFIE
+are the interrupt-pending and interrupt-enable bits for local counter-overflow
+interrupts.
+LCOFIP is read-write in `mip` and reflects the occurrence of a local
+counter-overflow overflow interrupt request resulting from any of the
+`mhpmevent__n__`.OF bits being set.
+If the Sscofpmf extension is not implemented, `mip`.LCOFIP and `mie`.LCOFIE are
+read-only zeros.
+
 Multiple simultaneous interrupts destined for M-mode are handled in the
-following decreasing priority order: MEI, MSI, MTI, SEI, SSI, STI.
+following decreasing priority order: MEI, MSI, MTI, SEI, SSI, STI, LCOFI.
 
 [NOTE]
 ====
@@ -1688,7 +1697,7 @@ Machine external interrupt
 14-15 +
 ≥16
 |_Reserved_ +
-_Reserved for counter-overflow interrupt_ +
+Counter-overflow interrupt +
 _Reserved_ +
 _Designated for platform use_ 
 |0 +

src/priv-preface.adoc

@@ -53,7 +53,7 @@ implemented.
 * Defined the RV32-only `medelegh` and `hedelegh` CSRs.
 * Defined the misaligned atomicity granule PMA, superseding the proposed Zam
   extension.
-* Reserved interrupt 13 for forthcoming counter-overflow interrupt extension.
+* Allocated interrupt 13 for Sscofpmf LCOFI interrupt.
 * Defined hardware error and software check exception codes.
 * Specified synchronization requirements when changing the PBMTE fields
 in `menvcfg` and `henvcfg`.

src/supervisor.adoc

@@ -287,14 +287,23 @@ interrupt-enable bits for supervisor-level software interrupts. If
 implemented, SSIP is writable in `sip` and may also be set to 1 by a
 platform-specific interrupt controller.
 
+If the Sscofpmf extension is implemented, bits `sip`.LCOFIP and `sie`.LCOFIE
+are the interrupt-pending and interrupt-enable bits for local counter-overflow
+interrupts.
+LCOFIP is read-write in `sip` and reflects the occurrence of a local
+counter-overflow overflow interrupt request resulting from any of the
+`mhpmevent__n__`.OF bits being set.
+If the Sscofpmf extension is not implemented, `sip`.LCOFIP and `sie`.LCOFIE are
+read-only zeros.
+
 [NOTE]
 ====
 Interprocessor interrupts are sent to other harts by
 implementation-specific means, which will ultimately cause the SSIP bit
 to be set in the recipient hart’s `sip` register.
 ====
 
-Each standard interrupt type (SEI, STI, or SSI) may not be implemented,
+Each standard interrupt type (SEI, STI, SSI, or LCOFI) may not be implemented,
 in which case the corresponding interrupt-pending and interrupt-enable
 bits are read-only zeros. All bits in `sip` and `sie` are *WARL* fields. The
 implemented interrupts may be found by writing one to every bit location
@@ -315,7 +324,7 @@ M-mode to S-mode, they are shown as 0 in
 ====
 
 Multiple simultaneous interrupts destined for supervisor mode are
-handled in the following decreasing priority order: SEI, SSI, STI.
+handled in the following decreasing priority order: SEI, SSI, STI, LCOFI.
 
 ==== Supervisor Timers and Performance Counters
 
@@ -445,7 +454,7 @@ Supervisor timer interrupt +
 _Reserved_ +
 Supervisor external interrupt +
 _Reserved_ +
-_Reserved for counter-overflow interrupt_ +
+Counter-overflow interrupt +
 _Reserved_ +
 _Designated for platform use_