xilinx_bd: Adapted BARs to Milk-V PCIe controller

pulp-platform · Jan 9, 2024 · fddaa71 · fddaa71
1 parent 9871276
commit fddaa71
Showing 1 changed file with 24 additions and 7 deletions.
diff --git a/target/xilinx/flavor_bd/scripts/carfield_bd_vcu128.tcl b/target/xilinx/flavor_bd/scripts/carfield_bd_vcu128.tcl
@@ -413,14 +413,30 @@ proc create_root_design { parentCell } {
    CONFIG.axist_bypass_scale {Gigabytes} \
    CONFIG.axist_bypass_size {4} \
    CONFIG.axisten_freq {125} \
-   CONFIG.bar_indicator {BAR_1:0} \
+   CONFIG.bar_indicator {BAR_0} \
    CONFIG.functional_mode {AXI_Bridge} \
-   CONFIG.pf0_bar0_64bit {true} \
-   CONFIG.pf0_bar0_scale {Gigabytes} \
-   CONFIG.pf0_bar0_size {4} \
+   CONFIG.pciebar2axibar_0 {0x0000000020000000} \
+   CONFIG.pciebar2axibar_1 {0x0000000060000000} \
+   CONFIG.pf0_bar0_64bit {false} \
+   CONFIG.pf0_bar0_enabled {true} \
+   CONFIG.pf0_bar0_prefetchable {false} \
+   CONFIG.pf0_bar0_scale {Megabytes} \
+   CONFIG.pf0_bar0_size {1} \
+   CONFIG.pf0_bar1_enabled {true} \
+   CONFIG.pf0_bar1_scale {Megabytes} \
+   CONFIG.pf0_bar1_size {1} \
+   CONFIG.pf0_bar2_64bit {true} \
+   CONFIG.pf0_bar2_enabled {true} \
+   CONFIG.pf0_bar2_scale {Gigabytes} \
+   CONFIG.pf0_bar2_size {1} \
+   CONFIG.pf0_bar4_64bit {true} \
+   CONFIG.pf0_bar4_enabled {true} \
+   CONFIG.pf0_bar4_prefetchable {true} \
+   CONFIG.pf0_bar4_scale {Gigabytes} \
+   CONFIG.pf0_bar4_size {4} \
    CONFIG.pf0_device_id {9014} \
-   CONFIG.pf0_msix_cap_pba_bir {BAR_1:0} \
-   CONFIG.pf0_msix_cap_table_bir {BAR_1:0} \
+   CONFIG.pf0_msix_cap_pba_bir {BAR_0} \
+   CONFIG.pf0_msix_cap_table_bir {BAR_0} \
    CONFIG.pl_link_cap_max_link_width {X4} \
    CONFIG.xdma_axi_intf_mm {AXI_Memory_Mapped} \
    CONFIG.xdma_axilite_slave {true} \
@@ -513,7 +529,6 @@ proc create_root_design { parentCell } {
   # Restore current instance
   current_bd_instance $oldCurInst
 
-  validate_bd_design
   save_bd_design
 }
 # End of create_root_design()
@@ -526,3 +541,5 @@ proc create_root_design { parentCell } {
 create_root_design ""
 
 
+common::send_gid_msg -ssname BD::TCL -id 2053 -severity "WARNING" "This Tcl script was generated from a block design that has not been validated. It is possible that design <$design_name> may result in errors during validation."
+