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Support margin time #21

Closed
wants to merge 10 commits into from
Binary file removed src/pci_lmt/.config.py.swp
Binary file not shown.
7 changes: 7 additions & 0 deletions src/pci_lmt/args.py
Original file line number Diff line number Diff line change
Expand Up @@ -25,6 +25,13 @@ def add_common_args(parser: argparse.ArgumentParser) -> None:
help="Amount of time (in seconds) to wait before making BER measurements. Default: 5",
default=5,
)
parser.add_argument(
"-m",
dest="margin_time",
type=int,
help="Amount of time (in seconds) to stay during margin. Default: 1",
default=1,
)
parser.add_argument(
"-a",
dest="annotation",
Expand Down
6 changes: 5 additions & 1 deletion src/pci_lmt/collector.py
Original file line number Diff line number Diff line change
Expand Up @@ -95,7 +95,7 @@ def setup_lane_margin_on_device_list(self):
# FIXME: `voltage_or_timing` should be an enum; dont use strings for magic constants
# pylint: disable=too-many-branches
def collect_lane_margin_on_device_list(
self, voltage_or_timing="TIMING", steps=16, up_down=0, left_right_none=0
self, voltage_or_timing="TIMING", steps=16, up_down=0, left_right_none=0, margin_time=1
) -> ty.List[LmtLaneResult]:
"""Returns the Lane Margining Test result from all lanes as a list."""
results = []
Expand Down Expand Up @@ -142,6 +142,8 @@ def collect_lane_margin_on_device_list(
steps=steps,
)

time.sleep(margin_time)

sampler = dev.fetch_sample_count(lane=lane, receiver_number=self.receiver_number)
if stepper["error"] or sampler["error"]:
lane_result.error = True
Expand Down Expand Up @@ -218,6 +220,7 @@ def collect_lmt_on_bdfs(
test_info.hostname = hostname
test_info.model_name = model_name
test_info.dwell_time_secs = args.dwell_time
test_info.margin_time_secs = args.margin_time
test_info.error_count_limit = args.error_count_limit
test_info.test_version = PCI_LMT_VERSION
test_info.annotation = args.annotation
Expand Down Expand Up @@ -247,6 +250,7 @@ def collect_lmt_on_bdfs(
steps=devices.steps,
up_down=devices.up_down,
left_right_none=devices.left_right_none,
margin_time=args.margin_time,
)
stop_time = time.time()
test_info.elapsed_time_secs = stop_time - start_time
Expand Down
4 changes: 2 additions & 2 deletions src/pci_lmt/pcie_lane_margining.py
Original file line number Diff line number Diff line change
Expand Up @@ -675,7 +675,7 @@ def decode_step_margin_timing_offset_right_left_of_default(self, lane: int):
# Margin Payload[5:0] = MErrorCount
ret = self.decode_margining_lane_status_register(lane=lane)
start_time = time.time()
while ret["margin_type_status"] != 0x3:
while ret["margin_type_status"] != 0x3 or ((ret["margin_payload_status"] & 0xC0) >> 6) != 0x2:
ret = self.decode_margining_lane_status_register(lane=lane)
if time.time() - start_time > TIMEOUT:
return {"error": "ERROR: decode_StepMarginTimingOffsetRightLeftOfDefault - timedout"}
Expand Down Expand Up @@ -759,7 +759,7 @@ def decode_step_margin_voltage_offset_up_down_of_default(self, lane: int):
# Margin Payload[5:0] = MErrorCount
ret = self.decode_margining_lane_status_register(lane=lane)
start_time = time.time()
while ret["margin_type_status"] != 0x4:
while ret["margin_type_status"] != 0x4 or ((ret["margin_payload_status"] & 0xC0) >> 6) != 0x2:
ret = self.decode_margining_lane_status_register(lane=lane)
if time.time() - start_time > TIMEOUT:
return {"error": "ERROR: decode_StepMarginVoltageOffsetUpDownOfDefault - timedout"}
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1 change: 1 addition & 0 deletions src/pci_lmt/results.py
Original file line number Diff line number Diff line change
Expand Up @@ -25,6 +25,7 @@ class LmtTestInfo: # pylint: disable=too-many-instance-attributes,too-few-publi
hostname: str = ""
model_name: str = ""
dwell_time_secs: int = -1
margin_time_secs: int = -1
elapsed_time_secs: float = -1
error_count_limit: int = -1
test_version: str = ""
Expand Down
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