Releases: lxp32/lxp32-cpu
v1.4
v1.3
This release removes support for temporarily blocked interrupts (interrupts can still be disabled) and introduces wake-up interrupts.
v1.2
This release introduces a few non-breaking changes to the software and testbench. The CPU RTL description hasn’t been changed from the previous release.
• lxp32asm now supports C-style conditional processing directives: #ifdef, #ifndef, #else and #endif.
• #define directive can now declare a macro with zero subsitute tokens.
• A new #error directive.
• Minor changes to the testbench.
v1.1
This release introduces a minor but technically breaking hardware change: the START_ADDR generic, which used to be 30-bit, has been for convenience extended to a full 32-bit word; the two least significant bits are ignored.
The other breaking change affects the assembly language syntax. Previously all symbols used to be public, and multiple modules could not define symbols with the same name. As of now only symbols explicitly exported using the #export directive are public. #extern directive has been replaced by #import.
Other notable changes include:
- A new instruction, lcs (Load Constant Short), has been added, which loads a 21-bit sign extended constant to a register. Unlike lc, it is encoded as a single word and takes one cycle to execute.
- Optimizations in the divider unit. Division instructions (divs and divu) now take one fewer cycle to execute (modulo instructions are unaffected).
- LXP32 assembly language now supports a new instruction alias, neg (Negate), which is equivalent to sub dst, 0, src.
v1.0
release 1.0 tagged