Skip to content

[keymgr_dpe] Port keymgr_dpe_key_derivation test from integrated_dev #6353

[keymgr_dpe] Port keymgr_dpe_key_derivation test from integrated_dev

[keymgr_dpe] Port keymgr_dpe_key_derivation test from integrated_dev #6353

Triggered via pull request February 20, 2025 15:47
Status Success
Total duration 4h 33m 57s
Artifacts 31

ci.yml

on: pull_request
Earl Grey for CW340  /  Build bitstream
1h 31m
Earl Grey for CW340 / Build bitstream
Earl Grey for CW310 Hyperdebug  /  Build bitstream
1h 9m
Earl Grey for CW310 Hyperdebug / Build bitstream
Earl Grey for CW310  /  Build bitstream
2m 46s
Earl Grey for CW310 / Build bitstream
Lint (slow)
11m 1s
Lint (slow)
Build documentation
5m 46s
Build documentation
Airgapped build
10m 44s
Airgapped build
Verible lint
1m 5s
Verible lint
Run OTBN smoke Test
2m 37s
Run OTBN smoke Test
Run OTBN crypto tests
2m 42s
Run OTBN crypto tests
Verilated English Breakfast
3m 28s
Verilated English Breakfast
Verilated Earl Grey
49m 35s
Verilated Earl Grey
CW305's Bitstream
2m 32s
CW305's Bitstream
Build Docker Containers
2m 46s
Build Docker Containers
Build and test software
19m 15s
Build and test software
Build and test Darjeeling software
4m 6s
Build and test Darjeeling software
QEMU smoketest
2m 15s
QEMU smoketest
CW340 Test ROM Tests  /  FPGA test
3m 12s
CW340 Test ROM Tests / FPGA test
CW340 ROM Tests  /  FPGA test
49s
CW340 ROM Tests / FPGA test
CW340 ROM_EXT Tests  /  FPGA test
5m 40s
CW340 ROM_EXT Tests / FPGA test
CW340 SiVal Tests  /  FPGA test
17m 48s
CW340 SiVal Tests / FPGA test
CW340 SiVal ROM_EXT Tests  /  FPGA test
4m 58s
CW340 SiVal ROM_EXT Tests / FPGA test
CW340 Manufacturing Tests  /  FPGA test
41m 24s
CW340 Manufacturing Tests / FPGA test
Hyper310 ROM_EXT Tests  /  FPGA test
11m 48s
Hyper310 ROM_EXT Tests / FPGA test
CW310 SiVal Tests  /  FPGA test
22m 48s
CW310 SiVal Tests / FPGA test
CW310 SiVal ROM_EXT Tests  /  FPGA test
31m 21s
CW310 SiVal ROM_EXT Tests / FPGA test
CW310 Manufacturing Tests  /  FPGA test
28m 1s
CW310 Manufacturing Tests / FPGA test
CW310 Test ROM Tests  /  FPGA test
2m 54s
CW310 Test ROM Tests / FPGA test
CW310 ROM Tests  /  FPGA test
28m 4s
CW310 ROM Tests / FPGA test
Cache bitstreams to GCP
0s
Cache bitstreams to GCP
Verify FPGA jobs
21s
Verify FPGA jobs
Fit to window
Zoom out
Zoom in

Annotations

3 errors
Verilated English Breakfast
Process completed with exit code 1.
Lint (slow)
Process completed with exit code 1.
Build and test software
Process completed with exit code 1.

Artifacts

Produced during runtime
Name Size
chip_englishbreakfast_cw305
1.38 MB
execute_manuf_fpga_tests_cw310-targets
623 Bytes
execute_manuf_fpga_tests_cw310-test-results
59.8 KB
execute_manuf_fpga_tests_cw340-targets
594 Bytes
execute_manuf_fpga_tests_cw340-test-results
56.5 KB
execute_rom_ext_fpga_tests_cw310-targets
598 Bytes
execute_rom_ext_fpga_tests_cw310-test-results
31.7 KB
execute_rom_ext_fpga_tests_cw340-targets
427 Bytes
execute_rom_ext_fpga_tests_cw340-test-results
7.06 KB
execute_rom_fpga_tests_cw310-targets
1.73 KB
execute_rom_fpga_tests_cw310-test-results
46.4 KB
execute_rom_fpga_tests_cw340-targets
162 Bytes
execute_rom_fpga_tests_cw340-test-results
201 Bytes
execute_sival_fpga_tests_cw310-targets
784 Bytes
execute_sival_fpga_tests_cw310-test-results
38.4 KB
execute_sival_fpga_tests_cw340-targets
514 Bytes
execute_sival_fpga_tests_cw340-test-results
41 KB
execute_sival_rom_ext_fpga_tests_cw310-targets
2.27 KB
execute_sival_rom_ext_fpga_tests_cw310-test-results
186 KB
execute_sival_rom_ext_fpga_tests_cw340-targets
449 Bytes
execute_sival_rom_ext_fpga_tests_cw340-test-results
18.8 KB
execute_test_rom_fpga_tests_cw310-targets
326 Bytes
execute_test_rom_fpga_tests_cw310-test-results
3.3 KB
execute_test_rom_fpga_tests_cw340-targets
258 Bytes
execute_test_rom_fpga_tests_cw340-test-results
44.3 KB
partial-build-bin-chip_earlgrey_cw310
5.99 MB
partial-build-bin-chip_earlgrey_cw310_hyperdebug
5.99 MB
partial-build-bin-chip_earlgrey_cw340
10 MB
sw_build_test-test-results
73.5 KB
verilated_englishbreakfast
7.03 MB
verilator_earlgrey-test-results
9.03 KB