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[provisioning]: allow the owner to specify perso success condition #3489

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[provisioning]: allow the owner to specify perso success condition

[provisioning]: allow the owner to specify perso success condition #3489

Re-run triggered December 17, 2024 22:13
@timothytrippeltimothytrippel
#25406
vbendeb:owner_string
Status Success
Total duration 2h 3m 27s
Artifacts 34

ci.yml

on: pull_request
Lint (quick)
3m 21s
Lint (quick)
Earl Grey for CW340  /  Build bitstream
2m 2s
Earl Grey for CW340 / Build bitstream
Earl Grey for CW310  /  Build bitstream
2m 37s
Earl Grey for CW310 / Build bitstream
Earl Grey for CW310 Hyperdebug  /  Build bitstream
2m 3s
Earl Grey for CW310 Hyperdebug / Build bitstream
Lint (slow)
10m 56s
Lint (slow)
Build documentation
4m 42s
Build documentation
Airgapped build
11m 57s
Airgapped build
Verible lint
1m 2s
Verible lint
Run OTBN smoke Test
2m 41s
Run OTBN smoke Test
Run OTBN crypto tests
22m 38s
Run OTBN crypto tests
Verilated English Breakfast
8m 7s
Verilated English Breakfast
Verilated Earl Grey
1h 26m
Verilated Earl Grey
CW305's Bitstream
21m 51s
CW305's Bitstream
Build Docker Containers
2m 39s
Build Docker Containers
Build and test software
12m 11s
Build and test software
CW340 Test ROM Tests  /  FPGA test
1m 4s
CW340 Test ROM Tests / FPGA test
CW340 ROM Tests  /  FPGA test
1m 0s
CW340 ROM Tests / FPGA test
CW340 ROM_EXT Tests  /  FPGA test
1m 3s
CW340 ROM_EXT Tests / FPGA test
CW340 SiVal Tests  /  FPGA test
7m 58s
CW340 SiVal Tests / FPGA test
CW340 SiVal ROM_EXT Tests  /  FPGA test
1m 3s
CW340 SiVal ROM_EXT Tests / FPGA test
CW340 Manufacturing Tests  /  FPGA test
11m 29s
CW340 Manufacturing Tests / FPGA test
CW310 Test ROM Tests  /  FPGA test
9m 1s
CW310 Test ROM Tests / FPGA test
CW310 ROM Tests  /  FPGA test
32m 52s
CW310 ROM Tests / FPGA test
CW310 ROM_EXT Tests  /  FPGA test
8m 40s
CW310 ROM_EXT Tests / FPGA test
CW310 SiVal Tests  /  FPGA test
37m 26s
CW310 SiVal Tests / FPGA test
CW310 SiVal ROM_EXT Tests  /  FPGA test
39m 15s
CW310 SiVal ROM_EXT Tests / FPGA test
CW310 Manufacturing Tests  /  FPGA test
36m 46s
CW310 Manufacturing Tests / FPGA test
CW310 ROM_EXT Tests  /  FPGA test
18m 29s
CW310 ROM_EXT Tests / FPGA test
Cache bitstreams to GCP
0s
Cache bitstreams to GCP
Verify FPGA jobs
23s
Verify FPGA jobs
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Annotations

2 errors
Lint (slow)
Process completed with exit code 1.
Build and test software
Process completed with exit code 127.

Artifacts

Produced during runtime
Name Size
execute_rom_fpga_tests_cw310-targets
1.8 KB
execute_rom_fpga_tests_cw310-test-results
45.4 KB