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Pull requests: chipsalliance/t1

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Pull requests list

timing debug
#908 opened Dec 23, 2024 by qinjun-li Loading…
Use printf fd
#890 opened Dec 10, 2024 by FanShupei Loading…
1
Reimplement AXI slave in SV
#888 opened Dec 8, 2024 by FanShupei • Draft
lane io PD-Lane Ask T1-Inhouse Flow to Run Physical Design for Lane
#880 opened Dec 5, 2024 by qinjun-li • Draft
Add eval cases
#860 opened Nov 21, 2024 by SharzyL Loading…
1
[rtl] disable memory interleaving.
#857 opened Nov 20, 2024 by qinjun-li • Draft
[rtl] disable chaining.
#856 opened Nov 20, 2024 by qinjun-li • Draft
Benchmark
#849 opened Nov 18, 2024 by Avimitin Loading…
add more coverage target
#837 opened Nov 9, 2024 by Clo91eaf Loading…
fix early end of t1rocketemu
#834 opened Nov 6, 2024 by Clo91eaf Loading…
[nix] lvgl init at 9.2.1
#819 opened Oct 28, 2024 by SharzyL Loading…
[nix] add sail riscv model builder
#780 opened Sep 12, 2024 by Avimitin Loading…
[ipemu] draft AXI4 InstanceChoice version of T1 IPEmulator
#755 opened Aug 29, 2024 by sequencer Loading…
fpu decode
#749 opened Aug 27, 2024 by qinjun-li Loading…
support zvk
#731 opened Aug 19, 2024 by Lucas-Wye Loading…
Fix spike trap
#727 opened Aug 16, 2024 by PorterLu Loading…
Add OM for VRF
#721 opened Aug 13, 2024 by sequencer Loading…
1
[drawio] update drawio.
#701 opened Aug 4, 2024 by qinjun-li Loading…
[rtl] add probe for write queue enq.
#670 opened Jul 8, 2024 by qinjun-li Loading…
nix: add graalvm 21.0.2
#544 opened Apr 25, 2024 by SharzyL Loading…
add mmm testcases
#435 opened Jan 31, 2024 by SharzyL • Draft
1
[rtl] Crop bit width for dynamic selection.
#249 opened Jul 5, 2023 by sequencer • Draft
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