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# This file is part of the faebryk project | ||
# SPDX-License-Identifier: MIT | ||
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import logging | ||
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import faebryk.library._F as F | ||
from faebryk.core.module import Module | ||
from faebryk.libs.library import L | ||
from faebryk.libs.units import P | ||
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logger = logging.getLogger(__name__) | ||
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class INA228(Module): | ||
def set_address(self, address: int = 0x00) -> None: | ||
"""Set the I2C address of the INA228""" | ||
# allias | ||
gnd = self.power.lv | ||
vs = self.power.hv | ||
sda = self.i2c.sda | ||
scl = self.i2c.scl | ||
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address_map = { | ||
0b0000: (gnd, gnd), | ||
0b0001: (gnd, vs), | ||
0b0010: (gnd, sda), | ||
0b0011: (gnd, scl), | ||
0b0100: (vs, gnd), | ||
0b0101: (vs, vs), | ||
0b0110: (vs, sda), | ||
0b0111: (vs, scl), | ||
0b1000: (sda, gnd), | ||
0b1001: (sda, vs), | ||
0b1010: (sda, sda), | ||
0b1011: (sda, scl), | ||
0b1100: (scl, gnd), | ||
0b1101: (scl, vs), | ||
0b1110: (scl, sda), | ||
0b1111: (scl, scl), | ||
} | ||
address |= 0b1000000 | ||
# address looks like 0b100xxxx | ||
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a1_connect, a0_connect = address_map.get(address, (gnd, gnd)) | ||
self.address_config_pin[0].connect(a0_connect) | ||
self.address_config_pin[1].connect(a1_connect) | ||
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# ---------------------------------------- | ||
# modules, interfaces, parameters | ||
# ---------------------------------------- | ||
i2c: F.I2C | ||
power: F.ElectricPower | ||
address_config_pin = L.list_field(2, F.ElectricLogic) | ||
alert: F.ElectricLogic | ||
bus_voltage_sense: F.Electrical | ||
differential_input: F.DifferentialPair | ||
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# ---------------------------------------- | ||
# traits | ||
# ---------------------------------------- | ||
designator_prefix = L.f_field(F.has_designator_prefix_defined)("U") | ||
datasheet = L.f_field(F.has_datasheet_defined)( | ||
"https://www.ti.com/lit/ds/symlink/ina228.pdf" | ||
) | ||
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@L.rt_field | ||
def single_electric_reference(self): | ||
return F.has_single_electric_reference_defined( | ||
F.ElectricLogic.connect_all_module_references(self) | ||
) | ||
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def __preinit__(self): | ||
# ------------------------------------ | ||
# connections | ||
# ------------------------------------ | ||
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# ------------------------------------ | ||
# parametrization | ||
# ------------------------------------ | ||
self.power.voltage.merge(F.Range(2.7 * P.V, 5.5 * P.V)) |
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# This file is part of the faebryk project | ||
# SPDX-License-Identifier: MIT | ||
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import logging | ||
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import faebryk.library._F as F | ||
from faebryk.core.module import Module | ||
from faebryk.libs.library import L | ||
from faebryk.libs.units import P | ||
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logger = logging.getLogger(__name__) | ||
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class INA228_ReferenceDesign(Module): | ||
# ---------------------------------------- | ||
# modules, interfaces, parameters | ||
# ---------------------------------------- | ||
shunt: F.Resistor | ||
ina288: F.INA228 | ||
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pwr_load: F.ElectricPower | ||
pwr_source: F.ElectricPower | ||
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# ---------------------------------------- | ||
# traits | ||
# ---------------------------------------- | ||
@L.rt_field | ||
def can_bridge(self): | ||
(F.can_bridge_defined(self.pwr_load, self.pwr_source)) | ||
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@L.rt_field | ||
def single_electric_reference(self): | ||
return F.has_single_electric_reference_defined( | ||
F.ElectricLogic.connect_all_module_references(self, gnd_only=True) | ||
) | ||
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def __init__(self, filtered: bool = False): | ||
super().__init__() | ||
self._filtered = filtered | ||
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def __preinit__(self): | ||
# ---------------------------------------- | ||
# parametrization | ||
# ---------------------------------------- | ||
self.shunt.resistance.merge(15 * P.mohm) | ||
self.shunt.rated_power.merge(2 * P.W) | ||
# TODO: calculate according to datasheet p36 | ||
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if self._filtered: | ||
filter_cap = F.Capacitor() | ||
filter_resistors = L.list_field(2, F.Resistor) | ||
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filter_cap.capacitance.merge(0.1 * P.uF) | ||
filter_cap.rated_voltage.merge(170 * P.V) | ||
for res in filter_resistors: | ||
res.resistance.merge(10 * P.kohm) | ||
# TODO: auto calculate, see: https://www.ti.com/lit/ug/tidu473/tidu473.pdf | ||
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# ---------------------------------------- | ||
# connections | ||
# ---------------------------------------- | ||
self.pwr_load.hv.connect_via(self.shunt, self.pwr_source.hv) | ||
self.ina288.bus_voltage_sense.connect(self.pwr_load.hv) | ||
if self._filtered: | ||
self.pwr_load.hv.connect_via(filter_cap, self.pwr_source.hv) | ||
self.ina288.differential_input.n.connect_via( | ||
filter_resistors[1], self.pwr_load.hv | ||
) | ||
self.ina288.differential_input.p.connect_via( | ||
filter_resistors[0], self.pwr_source.hv | ||
) | ||
else: | ||
self.ina288.differential_input.n.connect(self.pwr_load.hv) | ||
self.ina288.differential_input.p.connect(self.pwr_source.hv) | ||
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# decouple power rail | ||
self.ina288.power.get_trait(F.can_be_decoupled).decouple().capacitance.merge( | ||
0.1 * P.uF | ||
) |
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