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[WIP] Add ASIC Flow #430

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[WIP] Add ASIC Flow

[WIP] Add ASIC Flow #430

Triggered via pull request July 5, 2023 10:12
@lpawelczlpawelcz
synchronize #8
pcza/add-asic-env-sv
Status Failure
Total duration 30m 47s
Artifacts –

ci.yml

on: pull_request
Build-Yosys-SystemVerilog  /  Build yosys-systemverilog
30m 35s
Build-Yosys-SystemVerilog / Build yosys-systemverilog
Run-ASIC-Flow  /  VeeR EL2 ASIC Flow
Run-ASIC-Flow / VeeR EL2 ASIC Flow
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Build-Yosys-SystemVerilog / Build yosys-systemverilog
Process completed with exit code 1.