feat(Build): Trigger Rebuilds in Dual-Core Projects if RISCV Project Content Changes #1172
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@perkinsmg FYI |
Thanks Jake! I saw this yesterday, and we're planning to try it and take the fix today. |
perkinsmg
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Sep 13, 2024
sihyung-maxim
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Sep 16, 2024
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Pull in the latest code from main to add the fix for the "Basic Examples Test". The CI has an older ME18 revision attached which does not have the latest cache fix. Eric added this workaround for now until the latest ME18EVKITs are in stock: #1176 |
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Sep 24, 2024
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Description
Fixes CFSIO-2421
Previously, changing the source code inside the application specified by
RISCV_APPwould not trigger a re-build for dual-core projects (RISCV_LOAD = 1).This PR fixes that issue by forcing the target rule for generating the RISC-V binary to always be re-evaluated. Note this doesn't trigger a full re-build if nothing changes (which is good), and only an incremental re-build if something has, so the build speed impact is minimal.
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