Skip to content

Pull requests: YosysHQ/yosys

New pull request New
122 Open 2,699 Closed
122 Open 2,699 Closed
Author
Filter by author
Loading
Label
Filter by label
Loading
Use alt + click/return to exclude labels
or ⇧ + click/return for logical OR
Projects
Filter by project
Loading
Milestones
Filter by milestone
Loading
Reviews
Filter by reviews
No reviews Review required Approved review Changes requested
Assignee
Filter by who’s assigned
Sort
Sort by
Newest Oldest Most commented Least commented Recently updated Least recently updated Best match
Most reactions
👍 👎 😄 🎉 😕 ❤️ 🚀 👀

Pull requests list

dfflibmap: Adds flop name preserving pass to match write_verilog
#4829 opened Dec 24, 2024 by QuantamHD Loading…
1
Update ALU MULT mode in gowin to match nextpnr
#4827 opened Dec 23, 2024 by aerkiaga Loading…
wreduce: Optimize signedness when possible
#4819 opened Dec 16, 2024 by povik Loading…
7
Add $macc_v2
#4818 opened Dec 13, 2024 by povik • Draft
3 of 14 tasks
1
macc: Stop using the B port
#4817 opened Dec 13, 2024 by povik Loading…
Add -blackbox option to setundef pass
#4812 opened Dec 10, 2024 by KrystalDelusion Loading…
2 of 3 tasks
qlf_k6n10f: leave unused clocks disconnected
#4796 opened Dec 3, 2024 by Ravenslofty Loading…
opt_expr: limit effort to reduce runtime on anomalous designs
#4782 opened Nov 28, 2024 by widlarizer Loading…
6
proc_dff: bit-granularity optimizations and refactoring
#4781 opened Nov 28, 2024 by georgerennie Loading…
1
Refactor full_selection
#4768 opened Nov 25, 2024 by KrystalDelusion Loading…
2 of 4 tasks
Add Optimization Barriers
#4763 opened Nov 20, 2024 by georgerennie Loading…
15
Makefile: add YOSYS_VER and friends to CXXFLAGS for plugin compat che…
#4757 opened Nov 19, 2024 by widlarizer Loading…
write_verilog: Lower $bwmux in expr mode
#4752 opened Nov 15, 2024 by povik Loading…
1
1
pyosys: dereference cpp objects when constructing a tuple
#4750 opened Nov 15, 2024 by georgerennie Loading…
cxxrtl: strip $paramod from module name in scope info
#4745 opened Nov 14, 2024 by whitequark Loading…
Add splitfanout pass
#4741 opened Nov 14, 2024 by akashlevy Loading…
9 of 10 tasks
12
Add muldiv_c and muxadd peepopts
#4740 opened Nov 13, 2024 by akashlevy Loading…
23 of 24 tasks
75
synth_quicklogic: add -noflatten option
#4735 opened Nov 13, 2024 by nakengelhardt Loading…
Fix setting bits of parameters in setundef pass
#4733 opened Nov 12, 2024 by kamilrakoczy Loading…
1
write_btor: support $buf
#4711 opened Nov 6, 2024 by georgerennie Loading…
1
extract_fa: Fix xor3/xnor3 inversion bug
#4691 opened Oct 30, 2024 by hovind Loading…
Respect $SOURCE_DATE_EPOCH in generate_bram_types_sim.py
#4683 opened Oct 24, 2024 by keszybz Loading…
5
opt_merge: hashing performance and correctness
#4677 opened Oct 18, 2024 by widlarizer • Draft
3
Add tri-state support for const eval and add tribuf -propagate option
#4661 opened Oct 13, 2024 by Rodrigodd Loading…
Prepend Verilog globals to module AST
#4656 opened Oct 11, 2024 by jmi2k Loading…
1
2
ProTip! Adding no:label will show everything without a label.