cost: Add $mem_v2, $macc_v2 estimates

[povik]

What are the reasons/motivation for this change?

Fill in blind spots of the keep_hierarchy command.

Explain how this is achieved.

Add $mem, $macc estimation consistent with existing $mul, $dff formulas.

If applicable, please suggest to reviewers how they can test the change.

This script can exercise the new support:

design -reset
read_verilog <<EOF
module top(input clk, input [10:0] a, input [2:0] w, output [2:0] y);
	reg [3:0] m[60:0];

	always @(posedge clk) begin
		y <= m[a];
		m[a] <= w;
	end
endmodule
EOF
prep
keep_hierarchy -min_cost 20

design -reset
read_verilog <<EOF
module top(input [2:0] a, input [2:0] b, output [2:0] y);
	assign y = a * b;
endmodule
EOF
design -save r
keep_hierarchy -min_cost 20

design -load r
alumacc
opt_clean
keep_hierarchy -min_cost 20

[widlarizer]

LGTM but the terminology change should be reflected in docs/source/cell/word_arith.rst as well

[widlarizer]

Actually the "port" concept that has been renamed to "term" is code-only and isn't referred to by the docs. The docs only refer to "port" as in cell port. The docs refer to the now-"term" as "summand" which is more explicit as to its role than "term" but longer. I would slightly prefer "term" being replaced with "summand" in the codebase for consistency but it's not a big deal