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remove sorts from some optimisation passes #4468

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remove sorts from some optimisation passes #4468

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1 change: 0 additions & 1 deletion passes/opt/opt.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -182,7 +182,6 @@ struct OptPass : public Pass {
}

design->optimize();
design->sort();
design->check();

log_header(design, fast_mode ? "Finished fast OPT passes.\n" : "Finished OPT passes. (There is nothing left to do.)\n");
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1 change: 0 additions & 1 deletion passes/opt/opt_clean.cc
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Expand Up @@ -745,7 +745,6 @@ struct CleanPass : public Pass {
log("Removed %d unused cells and %d unused wires.\n", count_rm_cells, count_rm_wires);

design->optimize();
design->sort();
design->check();

keep_cache.reset();
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1 change: 0 additions & 1 deletion techlibs/ice40/ice40_opt.cc
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Expand Up @@ -257,7 +257,6 @@ struct Ice40OptPass : public Pass {
}

design->optimize();
design->sort();
design->check();

log_header(design, "Finished OPT passes. (There is nothing left to do.)\n");
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6 changes: 4 additions & 2 deletions tests/arch/anlogic/mux.ys
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Expand Up @@ -39,6 +39,8 @@ proc
equiv_opt -assert -map +/anlogic/cells_sim.v synth_anlogic # equivalency check
design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
cd mux16 # Constrain all select calls below inside the top module
select -assert-count 5 t:AL_MAP_LUT6
select -assert-count 3 t:AL_MAP_LUT3
select -assert-count 8 t:AL_MAP_LUT4
select -assert-count 1 t:AL_MAP_LUT5

select -assert-none t:AL_MAP_LUT6 %% t:* %D
select -assert-none t:AL_MAP_LUT3 t:AL_MAP_LUT4 t:AL_MAP_LUT5 %% t:* %D
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