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Register re-allocation tweaks #340

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merged 7 commits into from
Feb 13, 2025
Merged

Register re-allocation tweaks #340

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a52c0af
[AIEX] Use a round-robin approach for register re-allocation.
gbossu Feb 5, 2025
ac01b37
[AIEX][NFC] AIEWawRegRewriter: Harmonise logging
gbossu Feb 7, 2025
a0bc1af
[AIEX] AIEWawRegRewriter: Track register aliases in LRU list
gbossu Feb 7, 2025
927da71
[AIEX] AIEWawRegRewriter: Tweak re-allocation for "unary" instructions
gbossu Feb 7, 2025
fe6c322
[AIEX] Aggressive re-allocation to favor loop-local vregs
gbossu Dec 17, 2024
f5d5180
[AIEX] AIEWawRegRewriter: re-allocation for GPRs
gbossu Feb 5, 2025
1dde07c
[AIE2p] Enable register re-allocation
gbossu Feb 11, 2025
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11 changes: 5 additions & 6 deletions llvm/lib/Target/AIE/AIE2TargetMachine.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
// (c) Copyright 2023-2024 Advanced Micro Devices, Inc. or its affiliates
// (c) Copyright 2023-2025 Advanced Micro Devices, Inc. or its affiliates
//
//===----------------------------------------------------------------------===//
//
Expand All @@ -27,10 +27,6 @@ cl::opt<bool>
EnableSubregRenaming("aie-subreg-renaming", cl::Hidden, cl::init(false),
cl::desc("Enable RenameIndependentSubregs pass"));

static cl::opt<bool>
EnableWAWRegRewrite("aie-wawreg-rewrite",
cl::desc("Enable the WAW Register Renaming in loops"),
cl::init(true), cl::Hidden);
static cl::opt<bool>
EnableReservedRegsLICM("aie-reserved-regs-licm", cl::Hidden, cl::init(true),
cl::desc("Enable LICM for some reserved registers"));
Expand All @@ -45,6 +41,7 @@ extern cl::opt<bool> EnableStagedRA;
extern cl::opt<bool> EnableSuperRegSplitting;
extern cl::opt<bool> AllocateMRegsFirst;
extern cl::opt<bool> EnablePreMISchedCoalescer;
extern cl::opt<bool> EnableWAWRegRewrite;

extern bool AIEDumpArtifacts;

Expand Down Expand Up @@ -161,8 +158,10 @@ bool AIE2PassConfig::addRegAssignAndRewriteOptimized() {
addPass(createAIESuperRegRewriter());
}
addPass(createGreedyRegisterAllocator());
if (EnableWAWRegRewrite)
if (EnableWAWRegRewrite) {
addPass(createAIEWawRegRewriter());
addPass(createGreedyRegisterAllocator());
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@F-Stuckmann F-Stuckmann Feb 11, 2025 •
edited
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should greedy also run after createAIEWawRegRewriter in AIE2p?

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Definitely, in general, the AIEWawRegRewriter pass does not even run for AIE2p. I assumed that the pass pipeline is shared, but that part is not. Good catch!

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Added a new commit for AIE2p

}
addPass(createVirtRegRewriter());

return true;
Expand Down
5 changes: 5 additions & 0 deletions llvm/lib/Target/AIE/AIEBaseTargetMachine.cpp
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Expand Up @@ -77,6 +77,11 @@ cl::opt<bool>
EnableStagedRA("aie-staged-ra", cl::Hidden, cl::init(true),
cl::desc("Enable multi-stage register allocation"));

cl::opt<bool>
EnableWAWRegRewrite("aie-wawreg-rewrite",
cl::desc("Enable the WAW Register Renaming in loops"),
cl::init(true), cl::Hidden);

cl::opt<bool>
EnableSuperRegSplitting("aie-split-superregs", cl::Hidden, cl::init(true),
cl::desc("Enable splitting super-regs into their "
Expand Down
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