[AIE PostPipeliner] compute and use ResMII for a pipeline candidate loop

Xilinx · Oct 22, 2024 · 9edd9d5 · 9edd9d5
1 parent f837672
commit 9edd9d5
Show file tree

Hide file tree

Showing 3 changed files with 35 additions and 4 deletions.
diff --git a/llvm/lib/Target/AIE/AIEInterBlockScheduling.cpp b/llvm/lib/Target/AIE/AIEInterBlockScheduling.cpp
@@ -592,9 +592,12 @@ SchedulingStage InterBlockScheduling::updateScheduling(BlockState &BS) {
 
   // The loop schedule has converged, so we could declare our work done.
   // But first try SWP
-  if (BS.getRegions().size() == 1 && BS.getPostSWP().canAccept(*BS.TheBlock)) {
-    BS.FixPoint.II = 1;
-    return BS.FixPoint.Stage = SchedulingStage::Pipelining;
+  if (BS.getRegions().size() == 1) {
+    auto &PostSWP = BS.getPostSWP();
+    if (PostSWP.canAccept(*BS.TheBlock)) {
+      BS.FixPoint.II = PostSWP.getResMII(*BS.TheBlock);
+      return BS.FixPoint.Stage = SchedulingStage::Pipelining;
+    }
   }
   return BS.FixPoint.Stage = SchedulingStage::SchedulingDone;
 }

diff --git a/llvm/lib/Target/AIE/AIEPostPipeliner.cpp b/llvm/lib/Target/AIE/AIEPostPipeliner.cpp
@@ -106,6 +106,30 @@ bool PostPipeliner::canAccept(MachineBasicBlock &LoopBlock) {
   return true;
 }
 
+int PostPipeliner::getResMII(MachineBasicBlock &LoopBlock) {
+  // For each instruction, find the first cycle in which it fits and collect the
+  // maximum
+  std::vector<uint64_t> Scoreboard(NInstr, 0);
+  int MII = 1;
+  for (auto &MI : LoopBlock) {
+    auto *SlotInfo = TII->getSlotInfo(TII->getSlotKind(MI.getOpcode()));
+    SlotBits Slots = SlotInfo ? SlotInfo->getSlotSet() : 0;
+
+    int C = 0;
+    while (C < NInstr && (Scoreboard[C] & Slots)) {
+      C++;
+    }
+    if (C >= NInstr) {
+      MII = NInstr;
+      break;
+    }
+    Scoreboard[C] |= Slots;
+    MII = std::max(MII, C + 1);
+  }
+  LLVM_DEBUG(dbgs() << "PostPipeliner: ResMII=" << MII << "\n");
+  return MII;
+}
+
 // This assigns Cycle of SU, Earliest of its predecessors and Earliest of
 // the next instance of SU.
 void PostPipeliner::scheduleNode(SUnit &SU, int Cycle) {

diff --git a/llvm/lib/Target/AIE/AIEPostPipeliner.h b/llvm/lib/Target/AIE/AIEPostPipeliner.h
@@ -127,7 +127,11 @@ class PostPipeliner {
 
   /// Check whether this is a suitable loop for the PostPipeliner. It also
   /// leaves some useful information.
-  bool canAccept(MachineBasicBlock &Loop);
+  bool canAccept(MachineBasicBlock &LoopBlock);
+
+  /// Get a lowerbound for the II required to accommodate the slots.
+  /// \pre canAccept has returned true
+  int getResMII(MachineBasicBlock &LoopBlock);
 
   // Schedule using the given InitiationInterval. Return true when successful.
   // In that case calls to the query methods below are legitimate