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Decode
The decode module is responsible for determining what resources are needed for the incoming instruction and decomposing those requirements down into a set of control signals. These signals indicate to the rest of the control unit that a specific instruction requires for example the scalar ALU and expects to read two inputs from and write one output to the scalar general purpose register file. It will also produce a simplified representation of the actual instruction that gets passed along to the rest of the pipeline for identifying what the actual desired operation is.
Decoding of the instruction and generating the control signals is done by three modules, the decode_core, the flag_generator, and the reg_field_encoder.
The decode_core performs the high level decoding of each instruction. The Southern Islands ISA breaks its instructions up into specific categories where instructions share encoding formats, so based on which type of instruction is observed things like register addresses and immediate values can be extracted from the same bit locations from all instructions of that type. Assuming that one is simply attempting to add a new instruction to an existing category of instructions, there should be no need to modify decode_core.
The flag_generator performs the actual instruction specific decoding, determining what actual resources are required by each instruction. These include determining which registers are actually being used, whether any special condition codes are required, or if the instruction is a special flow control instruction. This information is encoded in a series of nets that are propagated to the issue unit. Generally this should be the only file you will need to modify when adding new instructions.
The reg_field_encoder generates a register address that is properly offset into the region of the register file reserved for the wavefront the instruction belongs to. It also generates a few additional control values, indicating whether the register address in question refers to one of the wavefront state registers.