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17 Open 24 Closed
17 Open 24 Closed
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Issues list

RV32I and RV64I
#61 opened Dec 21, 2023 by quantrpeter
syntax error in quickstart
#60 opened Aug 17, 2022 by gipsyh
1
Is this repo no longer active?
#59 opened May 17, 2022 by jiegec
Some confusion about skip option
#57 opened Mar 11, 2022 by LIIT0215
are rvfi_valid and rvfi_trap mutually exclusive.
#56 opened Jan 19, 2022 by eroom1966
Can WARL read-only be handled in csrw_check?
#55 opened Sep 7, 2021 by silabs-robin
rvfi_reg_check is possibly broken (picorv32 also fails the assertion)
#53 opened May 27, 2021 by silabs-robin
3
Instruction checks: non-universal assertions should be generated based on instruction type
#49 opened May 21, 2021 by silabs-mateilga
Debug modelling
#44 opened Oct 28, 2020 by silabs-PaulZ
Incorrect width of insn_funct6 in I-type (shift variation) instruction format?
#42 opened Aug 6, 2020 by DonaldKellett
Value of rs1 during CSR*I instructions
#40 opened May 14, 2020 by olofk
2
JAL handling procedure
#39 opened May 5, 2020 by RojasMilo
1
Failed Checks in picorv32 Verification Following Quickstart Guide
#36 opened Feb 5, 2020 by myrealname
1
3
Adding support for a newRISC-V processor to riscv-formal
#34 opened Jan 2, 2020 by weedmank
4
RVFI load/store error detection
#32 opened Sep 27, 2019 by udinator
3
RVFIMON generate.py not creating ialign16
#30 opened Sep 15, 2019 by jasonB221
1
Mismatch between documentation and checks
#9 opened Sep 11, 2018 by acw1251
@cliffordwolf
5
ProTip! no:milestone will show everything without a milestone.