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[BACKPORT] Patches for STM32H7 support from Apache NuttX #286

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[BACKPORT] Patches for STM32H7 support from Apache NuttX #286

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f42a6c2
[BACKPORT] arch/arm stm32h7
royratcliffe Nov 13, 2023
be32c4c
[BACKPORT] revert g_current_regs & _vectors
royratcliffe Nov 14, 2023
74edf47
[BACKPORT] fix: use ampersand for HEAP_BASE
royratcliffe Nov 14, 2023
05e10c0
[BACKPORT] openamp 2022.10.0
royratcliffe Nov 14, 2023
e71887b
[BACKPORT] fix: #error typo
royratcliffe Nov 14, 2023
d5783a0
feat: support ARCH_CHIP_STM32H747AI
royratcliffe Nov 14, 2023
ab2517c
[BACKPORT] arch/arm armv7-m
royratcliffe Nov 14, 2023
684240d
[BACKPORT] feat: always_inline_function
royratcliffe Nov 14, 2023
9407790
[BACKPORT] fix: up_trigger_irq has cpuset
royratcliffe Nov 14, 2023
f183038
[BACKPORT] feat: restore_critical_section
royratcliffe Nov 14, 2023
380abd8
[BACKPORT] fix: panic without regs
royratcliffe Nov 14, 2023
10a2276
[BACKPORT] fix: debug ipc
royratcliffe Nov 14, 2023
01ef7d6
[BACKPORT] fix: arm common Make.defs
royratcliffe Nov 14, 2023
ba0b986
[BACKPORT] drivers/rptun
royratcliffe Nov 15, 2023
a2ebbb1
[BACKPORT] mm/circbuf
royratcliffe Nov 21, 2023
7142e06
Merge branch 'PX4:px4_firmware_nuttx-10.3.0+' into backport-stm32h7
royratcliffe Nov 29, 2023
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9 changes: 4 additions & 5 deletions arch/arm/Kconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -392,11 +392,8 @@ config ARCH_CHIP_STM32H7
select ARCH_HAVE_TICKLESS
select ARCH_HAVE_TIMEKEEPING
---help---
STMicro STM32H7 architectures (ARM Cortex-M7).

BEWARE: This is a work-in-progress and not yet ready for general
usage. See boards/arm/stm32/nucleo-h743zi/README.txt for the
current state of the port.
STMicro STM32H7 architectures (ARM Cortex-M7 or
dual ARM Cortex-M7 Cortex-M4).

config ARCH_CHIP_STM32L4
bool "STMicro STM32 L4"
Expand Down Expand Up @@ -650,6 +647,8 @@ config ARCH_CORTEXM0
config ARCH_ARMV7M
bool
default n
select ARCH_HAVE_CPUINFO
select ARCH_HAVE_PERF_EVENTS

config ARCH_CORTEXM3
bool
Expand Down
62 changes: 45 additions & 17 deletions arch/arm/include/armv7-m/irq.h
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Original file line number Diff line number Diff line change
Expand Up @@ -72,8 +72,9 @@
#define REG_R9 (7) /* R9 */
#define REG_R10 (8) /* R10 */
#define REG_R11 (9) /* R11 */
#define REG_EXC_RETURN (10) /* EXC_RETURN */
#define SW_INT_REGS (11)
#define REG_CONTROL (10) /* CONTROL */
#define REG_EXC_RETURN (11) /* EXC_RETURN */
#define SW_INT_REGS (12)

#ifdef CONFIG_ARCH_FPU

Expand Down Expand Up @@ -268,7 +269,7 @@ struct xcptcontext

/* Get/set the PRIMASK register */

static inline uint8_t getprimask(void) inline_function;
static inline uint8_t getprimask(void) always_inline_function;
static inline uint8_t getprimask(void)
{
uint32_t primask;
Expand All @@ -282,7 +283,7 @@ static inline uint8_t getprimask(void)
return (uint8_t)primask;
}

static inline void setprimask(uint32_t primask) inline_function;
static inline void setprimask(uint32_t primask) always_inline_function;
static inline void setprimask(uint32_t primask)
{
__asm__ __volatile__
Expand All @@ -293,13 +294,13 @@ static inline void setprimask(uint32_t primask)
: "memory");
}

static inline void cpsie(void) inline_function;
static inline void cpsie(void) always_inline_function;
static inline void cpsie(void)
{
__asm__ __volatile__ ("\tcpsie i\n");
}

static inline void cpsid(void) inline_function;
static inline void cpsid(void) always_inline_function;
static inline void cpsid(void)
{
__asm__ __volatile__ ("\tcpsid i\n");
Expand All @@ -311,7 +312,7 @@ static inline void cpsid(void)
* lower priority level as the BASEPRI value.
*/

static inline uint8_t getbasepri(void) inline_function;
static inline uint8_t getbasepri(void) always_inline_function;
static inline uint8_t getbasepri(void)
{
uint32_t basepri;
Expand All @@ -326,7 +327,7 @@ static inline uint8_t getbasepri(void)
return (uint8_t)basepri;
}

static inline void setbasepri(uint32_t basepri) inline_function;
static inline void setbasepri(uint32_t basepri) always_inline_function;
static inline void setbasepri(uint32_t basepri)
{
__asm__ __volatile__
Expand All @@ -344,7 +345,7 @@ static inline void setbasepri(uint32_t basepri)
* 837070 Workaround may be required if we are raising the priority.
*/

static inline void raisebasepri(uint32_t basepri) inline_function;
static inline void raisebasepri(uint32_t basepri) always_inline_function;
static inline void raisebasepri(uint32_t basepri)
{
register uint32_t primask;
Expand Down Expand Up @@ -379,7 +380,7 @@ static inline void raisebasepri(uint32_t basepri)

/* Disable IRQs */

static inline void up_irq_disable(void) inline_function;
static inline void up_irq_disable(void) always_inline_function;
static inline void up_irq_disable(void)
{
#ifdef CONFIG_ARMV7M_USEBASEPRI
Expand All @@ -393,7 +394,7 @@ static inline void up_irq_disable(void)

/* Save the current primask state & disable IRQs */

static inline irqstate_t up_irq_save(void) inline_function;
static inline irqstate_t up_irq_save(void) always_inline_function;
static inline irqstate_t up_irq_save(void)
{
#ifdef CONFIG_ARMV7M_USEBASEPRI
Expand Down Expand Up @@ -425,7 +426,7 @@ static inline irqstate_t up_irq_save(void)

/* Enable IRQs */

static inline void up_irq_enable(void) inline_function;
static inline void up_irq_enable(void) always_inline_function;
static inline void up_irq_enable(void)
{
/* In this case, we are always retaining or lowering the priority value */
Expand All @@ -436,7 +437,7 @@ static inline void up_irq_enable(void)

/* Restore saved primask state */

static inline void up_irq_restore(irqstate_t flags) inline_function;
static inline void up_irq_restore(irqstate_t flags) always_inline_function;
static inline void up_irq_restore(irqstate_t flags)
{
#ifdef CONFIG_ARMV7M_USEBASEPRI
Expand All @@ -457,14 +458,14 @@ static inline void up_irq_restore(irqstate_t flags)
"1:\n"
:
: "r" (flags)
: "memory");
: "cc", "memory");

#endif
}

/* Get/set IPSR */

static inline uint32_t getipsr(void) inline_function;
static inline uint32_t getipsr(void) always_inline_function;
static inline uint32_t getipsr(void)
{
uint32_t ipsr;
Expand All @@ -478,9 +479,36 @@ static inline uint32_t getipsr(void)
return ipsr;
}

/* Get/set FAULTMASK */

static inline uint32_t getfaultmask(void) always_inline_function;
static inline uint32_t getfaultmask(void)
{
uint32_t faultmask;
__asm__ __volatile__
(
"\tmrs %0, faultmask\n"
: "=r" (faultmask)
:
: "memory");

return faultmask;
}

static inline void setfaultmask(uint32_t faultmask) always_inline_function;
static inline void setfaultmask(uint32_t faultmask)
{
__asm__ __volatile__
(
"\tmsr faultmask, %0\n"
:
: "r" (faultmask)
: "memory");
}

/* Get/set CONTROL */

static inline uint32_t getcontrol(void) inline_function;
static inline uint32_t getcontrol(void) always_inline_function;
static inline uint32_t getcontrol(void)
{
uint32_t control;
Expand All @@ -494,7 +522,7 @@ static inline uint32_t getcontrol(void)
return control;
}

static inline void setcontrol(uint32_t control) inline_function;
static inline void setcontrol(uint32_t control) always_inline_function;
static inline void setcontrol(uint32_t control)
{
__asm__ __volatile__
Expand Down
64 changes: 61 additions & 3 deletions arch/arm/include/stm32h7/chip.h
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Original file line number Diff line number Diff line change
Expand Up @@ -70,15 +70,19 @@
defined (CONFIG_ARCH_CHIP_STM32H753II) || \
defined (CONFIG_ARCH_CHIP_STM32H753VI) || \
defined (CONFIG_ARCH_CHIP_STM32H753XI) || \
defined (CONFIG_ARCH_CHIP_STM32H753ZI)
#elif defined(CONFIG_ARCH_CHIP_STM32H747XI)
defined (CONFIG_ARCH_CHIP_STM32H753ZI) || \
defined (CONFIG_ARCH_CHIP_STM32H7B3LI) || \
defined (CONFIG_ARCH_CHIP_STM32H745XI) || \
defined (CONFIG_ARCH_CHIP_STM32H745ZI)
#elif defined(CONFIG_ARCH_CHIP_STM32H747AI) || \
defined(CONFIG_ARCH_CHIP_STM32H747XI)
#else
# error STM32 H7 chip not identified
#endif

/* Size SRAM */

#if defined(CONFIG_STM32H7_STM32H7X3XX)
#if defined(CONFIG_STM32H7_STM32H7X3XX) || defined(CONFIG_STM32H7_STM32H7X5XX)
/* Memory */

# define STM32H7_SRAM_SIZE (512*1024) /* 512Kb SRAM on AXI bus Matrix (D1) */
Expand Down Expand Up @@ -116,6 +120,60 @@
# error CONFIG_STM32H7_IO_CONFIG_x Not Set
# endif

# define STM32H7_NDMA (4) /* (4) DMA1, DMA2, BDMA and MDMA */
# define STM32H7_NADC (3) /* (3) ADC1-3*/
# define STM32H7_NDAC (2) /* (2) DAC1-2*/
# define STM32H7_NCMP (2) /* (2) ultra-low power comparators */
# define STM32H7_NPGA (2) /* (2) Operational amplifiers: OPAMP */
# define STM32H7_NDFSDM (1) /* (1) digital filters for sigma delta modulator */
# define STM32H7_NUSART (4) /* (4) USART1-3, 6 */
# define STM32H7_NSPI (6) /* (6) SPI1-6 */
# define STM32H7_NI2S (3) /* (3) I2S1-3 */
# define STM32H7_NUART (4) /* (4) UART4-5, 7-8 */
# define STM32H7_NI2C (4) /* (4) I2C1-4 */
# define STM32H7_NSAI (4) /* (4) SAI1-4*/
# define STM32H7_NCAN (2) /* (2) CAN1-2 */
# define STM32H7_NSDIO (2) /* (2) SDIO */
#elif defined(CONFIG_STM32H7_STM32H7B3XX)
/* Memory */

# define STM32H7_SRAM_SIZE (1024*1024) /* 1024Kb SRAM on AXI bus Matrix (D1) */
# define STM32H7_SRAM1_SIZE (64*1024) /* 64Kb SRAM1 on AHB bus Matrix (D2) */
# define STM32H7_SRAM2_SIZE (64*1024) /* 64Kb SRAM2 on AHB bus Matrix (D2) */
# define STM32H7_SRAM3_SIZE (0*1024) /* No SRAM3 on AHB bus Matrix (D2) */
# define STM32H7_SRAM123_SIZE (128*1024) /* 128Kb SRAM123 on AHB bus Matrix (D2) */
# define STM32H7_SRAM4_SIZE (32*1024) /* 32Kb SRAM2 on AHB bus Matrix (D3) */
# if defined(CONFIG_ARMV7M_HAVE_DTCM)
# define STM32H7_DTCM_SRAM_SIZE (128*1024) /* 128Kb DTCM SRAM on TCM interface */
# else
# define STM32H7_DTCM_SRAM_SIZE (0) /* No DTCM SRAM on TCM interface */
# endif
# if defined(CONFIG_ARMV7M_HAVE_ITCM)
# define STM32H7_ITCM_SRAM_SIZE (64*1024) /* 64b ITCM SRAM on TCM interface */
# else
# define STM32H7_ITCM_SRAM_SIZE (0) /* No ITCM SRAM on TCM interface */
# endif

/* Peripherals */

# if defined(CONFIG_STM32H7_IO_CONFIG_A)
# define STM32H7_NGPIO (10) /* GPIOA-GPIOJ */
# elif defined(CONFIG_STM32H7_IO_CONFIG_B)
# define STM32H7_NGPIO (11) /* GPIOA-GPIOK */
# elif defined(CONFIG_STM32H7_IO_CONFIG_I)
# define STM32H7_NGPIO (9) /* GPIOA-GPIOI */
# elif defined(CONFIG_STM32H7_IO_CONFIG_L)
# define STM32H7_NGPIO (11) /* GPIOA-GPIOK */
# elif defined(CONFIG_STM32H7_IO_CONFIG_V)
# define STM32H7_NGPIO (8) /* GPIOA-GPIOH, missing GPIOF-GPIOG */
# elif defined(CONFIG_STM32H7_IO_CONFIG_X)
# define STM32H7_NGPIO (11) /* GPIOA-GPIOK */
# elif defined(CONFIG_STM32H7_IO_CONFIG_Z)
# define STM32H7_NGPIO (8) /* GPIOA-GPIOH */
# else
# error CONFIG_STM32H7_IO_CONFIG_x Not Set
# endif

# define STM32H7_NDMA (4) /* (4) DMA1, DMA2, BDMA and MDMA */
# define STM32H7_NADC (3) /* (3) ADC1-3*/
# define STM32H7_NDAC (2) /* (2) DAC1-2*/
Expand Down
8 changes: 8 additions & 0 deletions arch/arm/include/stm32h7/irq.h
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Original file line number Diff line number Diff line change
Expand Up @@ -69,6 +69,14 @@

#if defined(CONFIG_STM32H7_STM32H7X3XX)
# include <arch/stm32h7/stm32h7x3xx_irq.h>
#elif defined(CONFIG_STM32H7_STM32H7B3XX)
# include <arch/stm32h7/stm32h7x3xx_irq.h>
#elif defined(CONFIG_STM32H7_STM32H7X5XX)
# if CONFIG_ARCH_CHIP_STM32H7_CORTEXM7
# include <arch/stm32h7/stm32h7x5xx_irq.h>
# else
# include <arch/stm32h7/stm32h7x5xx_cpu2_irq.h>
# endif
#elif defined(CONFIG_STM32H7_STM32H7X7XX)
# include <arch/stm32h7/stm32h7x7xx_irq.h>
#else
Expand Down
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