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cpu-o3: refactor branch predictors latency #172

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Sep 14, 2024
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15 changes: 10 additions & 5 deletions src/cpu/pred/BranchPredictor.py
Original file line number Diff line number Diff line change
Expand Up @@ -860,9 +860,10 @@ class TimedBaseFTBPredictor(SimObject):
cxx_class = 'gem5::branch_prediction::ftb_pred::TimedBaseFTBPredictor'
cxx_header = "cpu/pred/ftb/timed_base_pred.hh"

# TODO: parametrize numBr and numDelay
numBr = Param.Unsigned(2, "Number of maximum branches per entry")

# subclass are encouraged to explicitly declare latency as numDelay
numDelay = Param.Unsigned(1000, "Number of bubbles to put on a prediction")

class DefaultFTB(TimedBaseFTBPredictor):
type = 'DefaultFTB'
cxx_class = 'gem5::branch_prediction::ftb_pred::DefaultFTB'
Expand All @@ -873,8 +874,8 @@ class DefaultFTB(TimedBaseFTBPredictor):
instShiftAmt = Param.Unsigned(1, "Amount to shift PC to get inst bits")
numThreads = Param.Unsigned(1, "Number of threads")
numWays = Param.Unsigned(4, "Number of ways per set")
numDelay = Param.Unsigned(1, "Number of bubbles to put on a prediction")
numDelay = 1

class UFTB(DefaultFTB):
numEntries = 32
tagBits = 38
Expand All @@ -889,6 +890,7 @@ class RAS(TimedBaseFTBPredictor):
numEntries = Param.Unsigned(32, "Number of entries in the RAS")
ctrWidth = Param.Unsigned(8, "Width of the counter")
numInflightEntries = Param.Unsigned(384, "Number of inflight entries")
numDelay = 1

class uRAS(TimedBaseFTBPredictor):
type = 'uRAS'
Expand All @@ -897,6 +899,7 @@ class uRAS(TimedBaseFTBPredictor):

numEntries = Param.Unsigned(4, "Number of entries in the RAS")
ctrWidth = Param.Unsigned(2, "Width of the counter")
numDelay = 0

class FTBTAGE(TimedBaseFTBPredictor):
type = 'FTBTAGE'
Expand All @@ -911,6 +914,7 @@ class FTBTAGE(TimedBaseFTBPredictor):
histLengths = VectorParam.Unsigned([8, 13, 32, 119], "the FTB TAGE T0~Tn history length")
maxHistLen = Param.Unsigned(970, "The length of history passed from DBP")
numTablesToAlloc = Param.Unsigned(1,"The number of table to allocated each time")
numDelay = 1

class FTBITTAGE(TimedBaseFTBPredictor):
type = 'FTBITTAGE'
Expand All @@ -925,7 +929,8 @@ class FTBITTAGE(TimedBaseFTBPredictor):
histLengths = VectorParam.Unsigned([4, 8, 13, 16, 32], "the FTB TAGE T0~Tn history length")
maxHistLen = Param.Unsigned(970, "The length of history passed from DBP")
numTablesToAlloc = Param.Unsigned(1,"The number of table to allocated each time")

numDelay = 2

class DecoupledBPUWithFTB(BranchPredictor):
type = 'DecoupledBPUWithFTB'
cxx_class = 'gem5::branch_prediction::ftb_pred::DecoupledBPUWithFTB'
Expand Down
1 change: 0 additions & 1 deletion src/cpu/pred/ftb/ftb.cc
Original file line number Diff line number Diff line change
Expand Up @@ -51,7 +51,6 @@ DefaultFTB::DefaultFTB(const Params &p)
numBr(p.numBr),
numWays(p.numWays),
numSets(numEntries / numWays),
numDelay(p.numDelay),
ftbStats(this)
{
assert(numEntries % numWays == 0);
Expand Down
7 changes: 2 additions & 5 deletions src/cpu/pred/ftb/ftb.hh
Original file line number Diff line number Diff line change
Expand Up @@ -91,8 +91,6 @@ class DefaultFTB : public TimedBaseFTBPredictor

void specUpdateHist(const boost::dynamic_bitset<> &history, FullFTBPrediction &pred) override;

unsigned getDelay() override {return numDelay;}

/** Creates a FTB with the given number of entries, number of bits per
* tag, and instruction offset amount.
* @param numEntries Number of entries for the FTB.
Expand Down Expand Up @@ -255,9 +253,8 @@ class DefaultFTB : public TimedBaseFTBPredictor

unsigned numSets;

unsigned numDelay;

typedef struct FTBMeta {
typedef struct FTBMeta
{
bool hit;
bool l0_hit;
FTBEntry entry;
Expand Down
20 changes: 10 additions & 10 deletions src/cpu/pred/ftb/ftb_ittage.cc
Original file line number Diff line number Diff line change
Expand Up @@ -20,16 +20,16 @@ namespace branch_prediction {

namespace ftb_pred{

FTBITTAGE::FTBITTAGE(const Params& p):
TimedBaseFTBPredictor(p),
numPredictors(p.numPredictors),
tableSizes(p.tableSizes),
tableTagBits(p.TTagBitSizes),
tablePcShifts(p.TTagPcShifts),
histLengths(p.histLengths),
maxHistLen(p.maxHistLen),
numTablesToAlloc(p.numTablesToAlloc),
numBr(p.numBr)
FTBITTAGE::FTBITTAGE(const Params& p)
: TimedBaseFTBPredictor(p),
numPredictors(p.numPredictors),
tableSizes(p.tableSizes),
tableTagBits(p.TTagBitSizes),
tablePcShifts(p.TTagPcShifts),
histLengths(p.histLengths),
maxHistLen(p.maxHistLen),
numTablesToAlloc(p.numTablesToAlloc),
numBr(p.numBr)
{
DPRINTF(FTBITTAGE || debugFlag, "FTBITTAGE constructor numBr=%d\n", numBr);
tageTable.resize(numPredictors);
Expand Down
2 changes: 0 additions & 2 deletions src/cpu/pred/ftb/ftb_ittage.hh
Original file line number Diff line number Diff line change
Expand Up @@ -95,8 +95,6 @@ class FTBITTAGE : public TimedBaseFTBPredictor

void update(const FetchStream &entry) override;

unsigned getDelay() override { return 2; }

void commitBranch(const FetchStream &stream, const DynInstPtr &inst) override;

// check folded hists after speculative update and recover
Expand Down
22 changes: 11 additions & 11 deletions src/cpu/pred/ftb/ftb_tage.cc
Original file line number Diff line number Diff line change
Expand Up @@ -17,17 +17,17 @@ namespace branch_prediction {

namespace ftb_pred{

FTBTAGE::FTBTAGE(const Params& p):
TimedBaseFTBPredictor(p),
numPredictors(p.numPredictors),
tableSizes(p.tableSizes),
tableTagBits(p.TTagBitSizes),
tablePcShifts(p.TTagPcShifts),
histLengths(p.histLengths),
maxHistLen(p.maxHistLen),
numTablesToAlloc(p.numTablesToAlloc),
numBr(p.numBr),
sc(p.numBr, this)
FTBTAGE::FTBTAGE(const Params& p)
: TimedBaseFTBPredictor(p),
numPredictors(p.numPredictors),
tableSizes(p.tableSizes),
tableTagBits(p.TTagBitSizes),
tablePcShifts(p.TTagPcShifts),
histLengths(p.histLengths),
maxHistLen(p.maxHistLen),
numTablesToAlloc(p.numTablesToAlloc),
numBr(p.numBr),
sc(p.numBr, this)
{
tageBankStats = new TageBankStats * [numBr];
for (int i = 0; i < numBr; i++) {
Expand Down
2 changes: 0 additions & 2 deletions src/cpu/pred/ftb/ftb_tage.hh
Original file line number Diff line number Diff line change
Expand Up @@ -94,8 +94,6 @@ class FTBTAGE : public TimedBaseFTBPredictor

void update(const FetchStream &entry) override;

unsigned getDelay() override { return 1; }

void commitBranch(const FetchStream &stream, const DynInstPtr &inst) override;

void setTrace() override;
Expand Down
2 changes: 0 additions & 2 deletions src/cpu/pred/ftb/ras.hh
Original file line number Diff line number Diff line change
Expand Up @@ -71,8 +71,6 @@ class RAS : public TimedBaseFTBPredictor

void specUpdateHist(const boost::dynamic_bitset<> &history, FullFTBPrediction &pred) override;

unsigned getDelay() override {return 1;}

void recoverHist(const boost::dynamic_bitset<> &history, const FetchStream &entry, int shamt, bool cond_taken) override;

void update(const FetchStream &entry) override;
Expand Down
3 changes: 2 additions & 1 deletion src/cpu/pred/ftb/timed_base_pred.cc
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,8 @@ namespace ftb_pred
{

TimedBaseFTBPredictor::TimedBaseFTBPredictor(const Params &p)
: SimObject(p)
: SimObject(p),
numDelay(p.numDelay)
{
}

Expand Down
5 changes: 4 additions & 1 deletion src/cpu/pred/ftb/timed_base_pred.hh
Original file line number Diff line number Diff line change
Expand Up @@ -43,7 +43,7 @@ class TimedBaseFTBPredictor: public SimObject
virtual void specUpdateHist(const boost::dynamic_bitset<> &history, FullFTBPrediction &pred) {}
virtual void recoverHist(const boost::dynamic_bitset<> &history, const FetchStream &entry, int shamt, bool cond_taken) {}
virtual void update(const FetchStream &entry) {}
virtual unsigned getDelay() {return 0;}
unsigned getDelay() { return numDelay; }
// do some statistics on a per-branch and per-predictor basis
virtual void commitBranch(const FetchStream &entry, const DynInstPtr &inst) {}

Expand All @@ -59,6 +59,9 @@ class TimedBaseFTBPredictor: public SimObject
}
virtual void setTrace() {}
DataBase *_db;

private:
unsigned int numDelay;
};

} // namespace ftb_pred
Expand Down
2 changes: 0 additions & 2 deletions src/cpu/pred/ftb/uras.hh
Original file line number Diff line number Diff line change
Expand Up @@ -42,8 +42,6 @@ class uRAS : public TimedBaseFTBPredictor

void specUpdateHist(const boost::dynamic_bitset<> &history, FullFTBPrediction &pred) override;

unsigned getDelay() override {return 0;}

void recoverHist(const boost::dynamic_bitset<> &history, const FetchStream &entry, int shamt, bool cond_taken) override;

void update(const FetchStream &entry) override;
Expand Down
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