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1. ASIC_for_ML-in-Hardware ASIC_for_ML-in-Hardware Public

   This repo stores original verilog-based codes for employing Fully-Connected Layer and 1-d Convolutional Layer into Xilinx Zynq 7000 SoC

   VHDL

2. Vision-Transformer-Visualization Vision-Transformer-Visualization Public

   Visualization Attention Maps for Vanilla ViT-B-16, Spike-driven Transformer V1,V2

   Python

3. litex-hub/linux-on-litex-vexriscv litex-hub/linux-on-litex-vexriscv Public

   Linux on LiteX-VexRiscv

   Python 582 173

4. Xintong-kexie/2023_NUEDC_C_Solution Xintong-kexie/2023_NUEDC_C_Solution Public

   2023年电赛C题（TI指定开发板电感电容测量装置）

   C 1