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drivers: dma: nios2: const device driver config
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Moves the nios2 msgdma driver device config struct to the device data
struct for mutable data. The config struct is expected to be const.

Signed-off-by: Tom Burdick <[email protected]>
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@teburd @nashif
teburd authored and nashif committed Mar 9, 2022
1 parent 82449f6 commit ad2799e
Showing 1 changed file with 31 additions and 32 deletions.
63 changes: 31 additions & 32 deletions drivers/dma/dma_nios2_msgdma.c
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Original file line number Diff line number Diff line change
Expand Up @@ -17,12 +17,11 @@
#include "altera_msgdma_descriptor_regs.h"
#include "altera_msgdma.h"

#define LOG_LEVEL CONFIG_DMA_LOG_LEVEL
#include <logging/log.h>
LOG_MODULE_REGISTER(dma_nios2);
LOG_MODULE_REGISTER(dma_nios2, CONFIG_DMA_LOG_LEVEL);

/* Device configuration parameters */
struct nios2_msgdma_dev_cfg {
struct nios2_msgdma_dev_data {
const struct device *dev;
alt_msgdma_dev *msgdma_dev;
alt_msgdma_standard_descriptor desc;
Expand All @@ -37,20 +36,20 @@ struct nios2_msgdma_dev_cfg {
static void nios2_msgdma_isr(void *arg)
{
const struct device *dev = (const struct device *)arg;
struct nios2_msgdma_dev_cfg *cfg = (struct nios2_msgdma_dev_cfg *)dev->config;
struct nios2_msgdma_dev_data *dev_data = (struct nios2_msgdma_dev_data *)dev->data;

/* Call Altera HAL driver ISR */
alt_handle_irq(cfg->msgdma_dev, DT_INST_IRQN(0));
alt_handle_irq(dev_data->msgdma_dev, DT_INST_IRQN(0));
}

static void nios2_msgdma_callback(void *context)
{
struct nios2_msgdma_dev_cfg *dev_cfg =
(struct nios2_msgdma_dev_cfg *)context;
struct nios2_msgdma_dev_data *dev_data =
(struct nios2_msgdma_dev_data *)context;
int err_code;
uint32_t status;

status = IORD_ALTERA_MSGDMA_CSR_STATUS(dev_cfg->msgdma_dev->csr_base);
status = IORD_ALTERA_MSGDMA_CSR_STATUS(dev_data->msgdma_dev->csr_base);

if (status & ALTERA_MSGDMA_CSR_STOPPED_ON_ERROR_MASK) {
err_code = -EIO;
Expand All @@ -62,13 +61,13 @@ static void nios2_msgdma_callback(void *context)

LOG_DBG("msgdma csr status Reg: 0x%x", status);

dev_cfg->dma_callback(dev_cfg->dev, dev_cfg->user_data, 0, err_code);
dev_data->dma_callback(dev_data->dev, dev_data->user_data, 0, err_code);
}

static int nios2_msgdma_config(const struct device *dev, uint32_t channel,
struct dma_config *cfg)
{
struct nios2_msgdma_dev_cfg *dev_cfg = (struct nios2_msgdma_dev_cfg *)dev->config;
struct nios2_msgdma_dev_data *dev_data = (struct nios2_msgdma_dev_data *)dev->data;
struct dma_block_config *dma_block;
int status;
uint32_t control;
Expand Down Expand Up @@ -102,30 +101,30 @@ static int nios2_msgdma_config(const struct device *dev, uint32_t channel,
return -EINVAL;
}

k_sem_take(&dev_cfg->sem_lock, K_FOREVER);
dev_cfg->dma_callback = cfg->dma_callback;
dev_cfg->user_data = cfg->user_data;
dev_cfg->direction = cfg->channel_direction;
k_sem_take(&dev_data->sem_lock, K_FOREVER);
dev_data->dma_callback = cfg->dma_callback;
dev_data->user_data = cfg->user_data;
dev_data->direction = cfg->channel_direction;
dma_block = cfg->head_block;
control = ALTERA_MSGDMA_DESCRIPTOR_CONTROL_TRANSFER_COMPLETE_IRQ_MASK |
ALTERA_MSGDMA_DESCRIPTOR_CONTROL_EARLY_TERMINATION_IRQ_MASK;

if (dev_cfg->direction == MEMORY_TO_MEMORY) {
if (dev_data->direction == MEMORY_TO_MEMORY) {
status = alt_msgdma_construct_standard_mm_to_mm_descriptor(
dev_cfg->msgdma_dev, &dev_cfg->desc,
dev_data->msgdma_dev, &dev_data->desc,
(alt_u32 *)dma_block->source_address,
(alt_u32 *)dma_block->dest_address,
dma_block->block_size,
control);
} else if (dev_cfg->direction == MEMORY_TO_PERIPHERAL) {
} else if (dev_data->direction == MEMORY_TO_PERIPHERAL) {
status = alt_msgdma_construct_standard_mm_to_st_descriptor(
dev_cfg->msgdma_dev, &dev_cfg->desc,
dev_data->msgdma_dev, &dev_data->desc,
(alt_u32 *)dma_block->source_address,
dma_block->block_size,
control);
} else if (dev_cfg->direction == PERIPHERAL_TO_MEMORY) {
} else if (dev_data->direction == PERIPHERAL_TO_MEMORY) {
status = alt_msgdma_construct_standard_st_to_mm_descriptor(
dev_cfg->msgdma_dev, &dev_cfg->desc,
dev_data->msgdma_dev, &dev_data->desc,
(alt_u32 *)dma_block->dest_address,
dma_block->block_size,
control);
Expand All @@ -135,25 +134,25 @@ static int nios2_msgdma_config(const struct device *dev, uint32_t channel,
}

/* Register msgdma callback */
alt_msgdma_register_callback(dev_cfg->msgdma_dev,
alt_msgdma_register_callback(dev_data->msgdma_dev,
nios2_msgdma_callback,
ALTERA_MSGDMA_CSR_GLOBAL_INTERRUPT_MASK |
ALTERA_MSGDMA_CSR_STOP_ON_ERROR_MASK |
ALTERA_MSGDMA_CSR_STOP_ON_EARLY_TERMINATION_MASK,
dev_cfg);
dev_data);

/* Clear the IRQ status */
IOWR_ALTERA_MSGDMA_CSR_STATUS(dev_cfg->msgdma_dev->csr_base,
IOWR_ALTERA_MSGDMA_CSR_STATUS(dev_data->msgdma_dev->csr_base,
ALTERA_MSGDMA_CSR_IRQ_SET_MASK);
k_sem_give(&dev_cfg->sem_lock);
k_sem_give(&dev_data->sem_lock);

return status;
}

static int nios2_msgdma_transfer_start(const struct device *dev,
uint32_t channel)
{
struct nios2_msgdma_dev_cfg *cfg = (struct nios2_msgdma_dev_cfg *)dev->config;
struct nios2_msgdma_dev_data *cfg = (struct nios2_msgdma_dev_data *)dev->data;
int status;

/* Nios-II mSGDMA supports only one channel per DMA core */
Expand All @@ -177,7 +176,7 @@ static int nios2_msgdma_transfer_start(const struct device *dev,
static int nios2_msgdma_transfer_stop(const struct device *dev,
uint32_t channel)
{
struct nios2_msgdma_dev_cfg *cfg = (struct nios2_msgdma_dev_cfg *)dev->config;
struct nios2_msgdma_dev_data *cfg = (struct nios2_msgdma_dev_data *)dev->data;
int ret = -EIO;
uint32_t status;

Expand Down Expand Up @@ -207,14 +206,14 @@ static const struct dma_driver_api nios2_msgdma_driver_api = {

static int nios2_msgdma0_initialize(const struct device *dev)
{
struct nios2_msgdma_dev_cfg *dev_cfg = (struct nios2_msgdma_dev_cfg *)dev->config;
struct nios2_msgdma_dev_data *dev_data = (struct nios2_msgdma_dev_data *)dev->data;

dev_cfg->dev = dev;
dev_data->dev = dev;

/* Initialize semaphore */
k_sem_init(&dev_cfg->sem_lock, 1, 1);
k_sem_init(&dev_data->sem_lock, 1, 1);

alt_msgdma_init(dev_cfg->msgdma_dev, 0, DT_INST_IRQN(0));
alt_msgdma_init(dev_data->msgdma_dev, 0, DT_INST_IRQN(0));

IRQ_CONNECT(DT_INST_IRQN(0), DT_INST_IRQ(0, priority),
nios2_msgdma_isr, DEVICE_DT_INST_GET(0), 0);
Expand All @@ -227,10 +226,10 @@ static int nios2_msgdma0_initialize(const struct device *dev)
ALTERA_MSGDMA_CSR_DESCRIPTOR_SLAVE_INSTANCE(MSGDMA_0, MSGDMA_0_CSR,
MSGDMA_0_DESCRIPTOR_SLAVE, msgdma_dev0)

static struct nios2_msgdma_dev_cfg dma0_nios2_config = {
static struct nios2_msgdma_dev_data dma0_nios2_data = {
.msgdma_dev = &msgdma_dev0,
};

DEVICE_DT_INST_DEFINE(0, &nios2_msgdma0_initialize,
NULL, NULL, &dma0_nios2_config, POST_KERNEL,
NULL, &dma0_nios2_data, NULL, POST_KERNEL,
CONFIG_DMA_INIT_PRIORITY, &nios2_msgdma_driver_api);

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