drivers: clock_control: clock_stm32_ll_h7: Fix PLL3 PQR output init

Due to typo in macro name, PLL3P, PLL3Q and PLL3R outputs are never enabled Signed-off-by: Tomislav Milkovic <[email protected]>
zephyrbot · Mar 10, 2022 · 7f365f4 · 7f365f4
1 parent 0e5d438
commit 7f365f4
Showing 1 changed file with 3 additions and 3 deletions.
diff --git a/drivers/clock_control/clock_stm32_ll_h7.c b/drivers/clock_control/clock_stm32_ll_h7.c
@@ -594,17 +594,17 @@ static int set_up_plls(void)
 
 	LL_RCC_PLL3FRACN_Disable();
 
-	if (IS_ENABLED(STM32_PLL3_P_ENABLE)) {
+	if (IS_ENABLED(STM32_PLL3_P_ENABLED)) {
 		LL_RCC_PLL3_SetP(STM32_PLL3_P_DIVISOR);
 		LL_RCC_PLL3P_Enable();
 	}
 
-	if (IS_ENABLED(STM32_PLL3_Q_ENABLE)) {
+	if (IS_ENABLED(STM32_PLL3_Q_ENABLED)) {
 		LL_RCC_PLL3_SetQ(STM32_PLL3_Q_DIVISOR);
 		LL_RCC_PLL3Q_Enable();
 	}
 
-	if (IS_ENABLED(STM32_PLL3_R_ENABLE)) {
+	if (IS_ENABLED(STM32_PLL3_R_ENABLED)) {
 		LL_RCC_PLL3_SetR(STM32_PLL3_R_DIVISOR);
 		LL_RCC_PLL3R_Enable();
 	}