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1. FemtoRV_RISCV FemtoRV_RISCV Public

   RISCV32I single core processor with UART implemented on the ARTIX7 FPGA

   C 1

2. AES_gf180 AES_gf180 Public

   Verilog

3. Physical_Verification_SKY130A Physical_Verification_SKY130A Public

   Understanding Physical Verification using open source tools such as Magic and Netgen

   Verilog 8 5

4. vsdip/vsdsquadron vsdip/vsdsquadron Public

   Python 4 6

5. BrunoLevy/learn-fpga BrunoLevy/learn-fpga Public

   Learning FPGA, yosys, nextpnr, and RISC-V

   C++ 2.5k 243

6. The-OpenROAD-Project/OpenROAD-flow-scripts The-OpenROAD-Project/OpenROAD-flow-scripts Public

   OpenROAD's scripts implementing an RTL-to-GDS Flow. Documentation at https://openroad-flow-scripts.readthedocs.io/en/latest/

   Verilog 322 280