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Move alu_op calculation to decode.sv
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@xerpi
xerpi committed Oct 9, 2018
1 parent c61cb24 commit de8c150
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Showing 4 changed files with 82 additions and 65 deletions.
66 changes: 4 additions & 62 deletions control.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -57,43 +57,41 @@ module control(
/* ID stage */
logic decode_regfile_we;
logic decode_csr_we;
alu_op_t decode_alu_op;

decode decode(
.instr_i(id_reg_i.instr),
.regfile_we_o(decode_regfile_we),
.csr_we_o(decode_csr_we)
.csr_we_o(decode_csr_we),
.alu_op_o(decode_alu_op)
);

assign id_ctrl_o.ex_reg_valid = id_reg_i.valid && !data_hazard && !control_hazard;
assign id_ctrl_o.regfile_we = id_reg_i.valid ? decode_regfile_we : 0;
assign id_ctrl_o.csr_we = id_reg_i.valid ? decode_csr_we : 0;
assign id_ctrl_o.alu_op = decode_alu_op;

/* EX stage */
assign ex_ctrl_o.mem_reg_valid = ex_reg_i.valid && !control_hazard;

always_comb begin
priority case (ex_reg_i.instr.common.opcode)
OPCODE_LUI: begin
ex_ctrl_o.alu_op = ALU_OP_IN2_PASSTHROUGH;
ex_ctrl_o.alu_in2_sel = ALU_IN2_SEL_IMM;
end
OPCODE_AUIPC: begin
ex_ctrl_o.alu_op = ALU_OP_ADD;
ex_ctrl_o.alu_in1_sel = ALU_IN1_SEL_PC;
ex_ctrl_o.alu_in2_sel = ALU_IN2_SEL_IMM;
end
OPCODE_JAL: begin
ex_ctrl_o.alu_op = ALU_OP_ADD;
ex_ctrl_o.alu_in1_sel = ALU_IN1_SEL_PC;
ex_ctrl_o.alu_in2_sel = ALU_IN2_SEL_IMM;
end
OPCODE_JALR: begin
ex_ctrl_o.alu_op = ALU_OP_ADD;
ex_ctrl_o.alu_in1_sel = ALU_IN1_SEL_REGFILE_OUT1;
ex_ctrl_o.alu_in2_sel = ALU_IN2_SEL_IMM;
end
OPCODE_BRANCH: begin
ex_ctrl_o.alu_op = ALU_OP_ADD;
ex_ctrl_o.alu_in1_sel = ALU_IN1_SEL_PC;
ex_ctrl_o.alu_in2_sel = ALU_IN2_SEL_IMM;

Expand All @@ -113,100 +111,44 @@ module control(
endcase
end
OPCODE_LOAD: begin
ex_ctrl_o.alu_op = ALU_OP_ADD;
ex_ctrl_o.alu_in1_sel = ALU_IN1_SEL_REGFILE_OUT1;
ex_ctrl_o.alu_in2_sel = ALU_IN2_SEL_IMM;
end
OPCODE_STORE: begin
ex_ctrl_o.alu_op = ALU_OP_ADD;
ex_ctrl_o.alu_in1_sel = ALU_IN1_SEL_REGFILE_OUT1;
ex_ctrl_o.alu_in2_sel = ALU_IN2_SEL_IMM;
end
OPCODE_OP_IMM: begin
ex_ctrl_o.alu_in1_sel = ALU_IN1_SEL_REGFILE_OUT1;
ex_ctrl_o.alu_in2_sel = ALU_IN2_SEL_IMM;

priority case (ex_reg_i.instr.itype.funct3)
FUNCT3_OP_IMM_ADDI:
ex_ctrl_o.alu_op = ALU_OP_ADD;
FUNCT3_OP_IMM_SLTI:
ex_ctrl_o.alu_op = ALU_OP_SLT;
FUNCT3_OP_IMM_SLTIU:
ex_ctrl_o.alu_op = ALU_OP_SLTU;
FUNCT3_OP_IMM_XORI:
ex_ctrl_o.alu_op = ALU_OP_XOR;
FUNCT3_OP_IMM_ORI:
ex_ctrl_o.alu_op = ALU_OP_OR;
FUNCT3_OP_IMM_ANDI:
ex_ctrl_o.alu_op = ALU_OP_AND;
FUNCT3_OP_IMM_SLLI:
ex_ctrl_o.alu_op = ALU_OP_SLL;
FUNCT3_OP_IMM_SRI:
if (ex_reg_i.instr.itype.imm[10] == 0)
ex_ctrl_o.alu_op = ALU_OP_SRL;
else
ex_ctrl_o.alu_op = ALU_OP_SRA;
endcase
end
OPCODE_OP: begin
ex_ctrl_o.alu_in1_sel = ALU_IN1_SEL_REGFILE_OUT1;
ex_ctrl_o.alu_in2_sel = ALU_IN2_SEL_REGFILE_OUT2;

priority case (ex_reg_i.instr.rtype.funct3)
FUNCT3_OP_ADD_SUB: begin
if (ex_reg_i.instr.rtype.funct7[5] == 0)
ex_ctrl_o.alu_op = ALU_OP_ADD;
else
ex_ctrl_o.alu_op = ALU_OP_SUB;
end
FUNCT3_OP_SLL:
ex_ctrl_o.alu_op = ALU_OP_SLL;
FUNCT3_OP_SLT:
ex_ctrl_o.alu_op = ALU_OP_SLT;
FUNCT3_OP_SLTU:
ex_ctrl_o.alu_op = ALU_OP_SLTU;
FUNCT3_OP_XOR:
ex_ctrl_o.alu_op = ALU_OP_XOR;
FUNCT3_OP_SR:
if (ex_reg_i.instr.rtype.funct7[5] == 0)
ex_ctrl_o.alu_op = ALU_OP_SRL;
else
ex_ctrl_o.alu_op = ALU_OP_SRA;
FUNCT3_OP_OR:
ex_ctrl_o.alu_op = ALU_OP_OR;
FUNCT3_OP_AND:
ex_ctrl_o.alu_op = ALU_OP_AND;
endcase
end
OPCODE_SYSTEM: begin
priority case (ex_reg_i.instr.itype.funct3)
FUNCT3_SYSTEM_CSRRW: begin
ex_ctrl_o.alu_in1_sel = ALU_IN1_SEL_REGFILE_OUT1;
ex_ctrl_o.alu_op = ALU_OP_IN1_PASSTHROUGH;
end
FUNCT3_SYSTEM_CSRRS: begin
ex_ctrl_o.alu_in1_sel = ALU_IN1_SEL_REGFILE_OUT1;
ex_ctrl_o.alu_in2_sel = ALU_IN2_SEL_CSR_OUT;
ex_ctrl_o.alu_op = ALU_OP_OR;
end
FUNCT3_SYSTEM_CSRRC: begin
ex_ctrl_o.alu_in1_sel = ALU_IN1_SEL_REGFILE_OUT1;
ex_ctrl_o.alu_in2_sel = ALU_IN2_SEL_CSR_OUT;
ex_ctrl_o.alu_op = ALU_OP_XOR;
end
FUNCT3_SYSTEM_CSRRWI: begin
ex_ctrl_o.alu_in2_sel = ALU_IN2_SEL_IMM;
ex_ctrl_o.alu_op = ALU_OP_IN2_PASSTHROUGH;
end
FUNCT3_SYSTEM_CSRRSI: begin
ex_ctrl_o.alu_in1_sel = ALU_IN1_SEL_CSR_OUT;
ex_ctrl_o.alu_in2_sel = ALU_IN2_SEL_IMM;
ex_ctrl_o.alu_op = ALU_OP_OR;
end
FUNCT3_SYSTEM_CSRRCI: begin
ex_ctrl_o.alu_in1_sel = ALU_IN1_SEL_CSR_OUT;
ex_ctrl_o.alu_in2_sel = ALU_IN2_SEL_IMM;
ex_ctrl_o.alu_op = ALU_OP_XOR;
end
endcase
end
Expand Down
3 changes: 2 additions & 1 deletion datapath.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -81,6 +81,7 @@ module datapath(
assign next_ex_reg.regfile_rd = id_reg.instr.common.rd;
assign next_ex_reg.regfile_we = id_ctrl.regfile_we;
assign next_ex_reg.csr_we = id_ctrl.csr_we;
assign next_ex_reg.alu_op = id_ctrl.alu_op;
assign next_ex_reg.valid = id_ctrl.ex_reg_valid;

regfile regfile(
Expand Down Expand Up @@ -147,7 +148,7 @@ module datapath(
end

alu alu(
.alu_op_i(ex_ctrl.alu_op),
.alu_op_i(ex_reg.alu_op),
.in1_i(alu_in1),
.in2_i(alu_in2),
.out_o(next_mem_reg.alu_out)
Expand Down
75 changes: 74 additions & 1 deletion decode.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,8 @@ import definitions::*;
module decode(
input instruction_t instr_i,
output logic regfile_we_o,
output logic csr_we_o
output logic csr_we_o,
output alu_op_t alu_op_o
);
always_comb begin
regfile_we_o = 0;
Expand Down Expand Up @@ -38,4 +39,76 @@ module decode(
end
endcase
end

always_comb begin
priority case (instr_i.common.opcode)
OPCODE_LUI:
alu_op_o = ALU_OP_IN2_PASSTHROUGH;
OPCODE_AUIPC, OPCODE_JAL, OPCODE_JALR, OPCODE_BRANCH,
OPCODE_LOAD, OPCODE_STORE:
alu_op_o = ALU_OP_ADD;
OPCODE_OP_IMM: begin
priority case (instr_i.itype.funct3)
FUNCT3_OP_IMM_ADDI:
alu_op_o = ALU_OP_ADD;
FUNCT3_OP_IMM_SLTI:
alu_op_o = ALU_OP_SLT;
FUNCT3_OP_IMM_SLTIU:
alu_op_o = ALU_OP_SLTU;
FUNCT3_OP_IMM_XORI:
alu_op_o = ALU_OP_XOR;
FUNCT3_OP_IMM_ORI:
alu_op_o = ALU_OP_OR;
FUNCT3_OP_IMM_ANDI:
alu_op_o = ALU_OP_AND;
FUNCT3_OP_IMM_SLLI:
alu_op_o = ALU_OP_SLL;
FUNCT3_OP_IMM_SRI:
if (instr_i.itype.imm[10] == 0)
alu_op_o = ALU_OP_SRL;
else
alu_op_o = ALU_OP_SRA;
endcase
end
OPCODE_OP: begin
priority case (instr_i.rtype.funct3)
FUNCT3_OP_ADD_SUB: begin
if (instr_i.rtype.funct7[5] == 0)
alu_op_o = ALU_OP_ADD;
else
alu_op_o = ALU_OP_SUB;
end
FUNCT3_OP_SLL:
alu_op_o = ALU_OP_SLL;
FUNCT3_OP_SLT:
alu_op_o = ALU_OP_SLT;
FUNCT3_OP_SLTU:
alu_op_o = ALU_OP_SLTU;
FUNCT3_OP_XOR:
alu_op_o = ALU_OP_XOR;
FUNCT3_OP_SR:
if (instr_i.rtype.funct7[5] == 0)
alu_op_o = ALU_OP_SRL;
else
alu_op_o = ALU_OP_SRA;
FUNCT3_OP_OR:
alu_op_o = ALU_OP_OR;
FUNCT3_OP_AND:
alu_op_o = ALU_OP_AND;
endcase
end
OPCODE_SYSTEM: begin
priority case (instr_i.itype.funct3)
FUNCT3_SYSTEM_CSRRW:
alu_op_o = ALU_OP_IN1_PASSTHROUGH;
FUNCT3_SYSTEM_CSRRS, FUNCT3_SYSTEM_CSRRSI:
alu_op_o = ALU_OP_OR;
FUNCT3_SYSTEM_CSRRC, FUNCT3_SYSTEM_CSRRCI:
alu_op_o = ALU_OP_XOR;
FUNCT3_SYSTEM_CSRRWI:
alu_op_o = ALU_OP_IN2_PASSTHROUGH;
endcase
end
endcase
end
endmodule
3 changes: 2 additions & 1 deletion definitions.sv
View file
Original file line number Diff line number Diff line change
Expand Up @@ -238,6 +238,7 @@ typedef struct packed {
logic [4:0] regfile_rd;
logic regfile_we;
logic csr_we;
alu_op_t alu_op;
logic valid;
} pipeline_ex_reg_t;

Expand Down Expand Up @@ -280,10 +281,10 @@ typedef struct packed {
logic ex_reg_valid;
logic regfile_we;
logic csr_we;
alu_op_t alu_op;
} pipeline_id_ctrl_t;

typedef struct packed {
alu_op_t alu_op;
alu_in1_sel_t alu_in1_sel;
alu_in2_sel_t alu_in2_sel;
compare_unit_op_t compare_unit_op;
Expand Down

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