Merge pull request #1 from arunnats/master

Youtube video embed
vinitkesh · Jun 6, 2024 · a290697 · a290697
2 parents 57f836d + 00a67c2
commit a290697
Showing 1 changed file with 35 additions and 40 deletions.
diff --git a/docs/Verilog/index.md b/docs/Verilog/index.md
@@ -17,14 +17,10 @@ features:
   - title: MIPS Single Cycle Processor
     details: Build an exciting MIPS single cycle processor which will allow you to run MIPS hardware commands.
     link: "#single-cycle-mips-processor"
-
 ---
 
-
-
-
 <!-- For full documentation visit [mkdocs.org](https://www.mkdocs.org).     -->
-<!-- 
+<!--
 This course covers the following topics-
 
 
@@ -34,70 +30,69 @@ This course covers the following topics-
 
 ## **Introduction to Verilog**
 
-**Theory** :  
+**Theory** :
 
 Documentation: [Link](./Intro.md)  
-Video Explanation of Theory:  
+Video Explanation of Theory:
 
- 1. [Theory Vid Part 1 (INTRO TO VERILOG-LOGIC GATES-ADDERS-SUBTRACTORS)](https://youtu.be/SnNwp8LP_2k)  
- 2. [Theory Vid Part 2 (PARITY-TILL END)](https://youtu.be/VU-qFRw2F_s)
+1.  [Theory Vid Part 1 (INTRO TO VERILOG-LOGIC GATES-ADDERS-SUBTRACTORS)](https://youtu.be/SnNwp8LP_2k)
+<iframe width="560" height="315" src="https://www.youtube.com/embed/SnNwp8LP_2k" frameborder="0" allow="accelerometer; autoplay; clipboard-write; encrypted-media; gyroscope; picture-in-picture" allowfullscreen></iframe>
 
+2.  [Theory Vid Part 2 (PARITY-TILL END)](https://youtu.be/VU-qFRw2F_s)
+<iframe width="560" height="315" src="https://www.youtube.com/embed/VU-qFRw2F_s" frameborder="0" allow="accelerometer; autoplay; clipboard-write; encrypted-media; gyroscope; picture-in-picture" allowfullscreen></iframe>
 
 **Implementation** :  
-How to Run Verilog Files in Quartus: [How to Run ?]( https://youtu.be/cICPPWahs0k)  
-Sample Codes: [Link]( https://github.com/hwlabnitc/Intro-to-Verilog )  
-Video Explanation of Select Codes:   
+How to Run Verilog Files in Quartus: [How to Run ?](https://youtu.be/cICPPWahs0k)
 
- 1. [Verilog Syntax](https://youtu.be/xPxiqmg8utg )    
- 2. [Adder Subtractor](https://youtu.be/QKHHTn3Egt8 )    
- 3. [DEMUX](https://youtu.be/cZN4N8gheUE)    
- 4. [Counter](https://youtu.be/lO8pcw8oQx8 )   
- 5. [Decoder](https://youtu.be/w--_pwD1ugM )      
+<iframe width="560" height="315" src="https://www.youtube.com/embed/cICPPWahs0k" frameborder="0" allow="accelerometer; autoplay; clipboard-write; encrypted-media; gyroscope; picture-in-picture" allowfullscreen></iframe>
+Sample Codes: [Link](https://github.com/hwlabnitc/Intro-to-Verilog)  
+Video Explanation of Select Codes:
 
-Assignment 1: [Download Here](https://docs.google.com/document/d/1Za0d04-Jw7r5GCAWyEl_munDtFIyCaKS/edit?usp=sharing&ouid=113214929865087000394&rtpof=true&sd=true )  
----
+1.  [Verilog Syntax](https://youtu.be/xPxiqmg8utg)
+2.  [Adder Subtractor](https://youtu.be/QKHHTn3Egt8)
+3.  [DEMUX](https://youtu.be/cZN4N8gheUE)
+4.  [Counter](https://youtu.be/lO8pcw8oQx8)
+5.  [Decoder](https://youtu.be/w--_pwD1ugM)
+
+## Assignment 1: [Download Here](https://docs.google.com/document/d/1Za0d04-Jw7r5GCAWyEl_munDtFIyCaKS/edit?usp=sharing&ouid=113214929865087000394&rtpof=true&sd=true)
 
 ## **Finite State Machines**
-    
+
 **Theory** :  
 Documentation: [Link](./SingleCycle.md)  
-Video Explanation of Concept:  
-
- 1. [Main Concept](https://youtu.be/9nHTW8BrM_w )  
- 2. [Syntax (Optional)](https://youtu.be/EqF6Gd7BQzk)
+Video Explanation of Concept:
 
+1.  [Main Concept](https://youtu.be/9nHTW8BrM_w)
+2.  [Syntax (Optional)](https://youtu.be/EqF6Gd7BQzk)
 
-**Implementation** :  
+**Implementation** :
 
 Video Explanation of Code (From Documentation):  
-[Examples of FSM along with Code explanation](https://youtu.be/zHOonX-TYoI)  
+[Examples of FSM along with Code explanation](https://youtu.be/zHOonX-TYoI)
 
 Code Bank:
-[Link to Sample Codes]( https://github.com/hwlab-csed/Finite-State-Machines)  
+[Link to Sample Codes](https://github.com/hwlab-csed/Finite-State-Machines)
 
 Assignment 2: [Download Here](https://docs.google.com/document/d/1avLaRaK21iEwoFccVg0-Q_Gl7DnGbY5e/edit?usp=sharing&ouid=113214929865087000394&rtpof=true&sd=true)
 
-
-## **Single Cycle MIPS Processor** 
+## **Single Cycle MIPS Processor**
 
 **Theory** :
 
 Documentation: [Link to Main Documentation](/)
 Video Explanation of Concept:
 
- 1. [Control Unit Theory]( https://youtu.be/_QdWPSIrtVo)
- 2. [Datapath Theory](https://youtu.be/n8S_XsjyF9U)  
-
+1.  [Control Unit Theory](https://youtu.be/_QdWPSIrtVo)
+2.  [Datapath Theory](https://youtu.be/n8S_XsjyF9U)
 
 **Implementation** :  
-Video Explanation of Code (From Documentation) :  
+Video Explanation of Code (From Documentation) :
 
- 1. [Code Modules 1 to 5 explained](https://youtu.be/akrKa3O-7T8)  
- 2. [Code Modules 6 to 10 explained](https://youtu.be/Q51G2JWI5t0)  
- 3. [All Testbenches explained](https://youtu.be/_pPCv_fkO1w)  
-Code Bank:  
+1.  [Code Modules 1 to 5 explained](https://youtu.be/akrKa3O-7T8)
+2.  [Code Modules 6 to 10 explained](https://youtu.be/Q51G2JWI5t0)
+3.  [All Testbenches explained](https://youtu.be/_pPCv_fkO1w)  
+    Code Bank:
 
- [Link to Sample Codes]( https://github.com/hwlab-csed/Single-Cycle-Processor)  
+[Link to Sample Codes](https://github.com/hwlab-csed/Single-Cycle-Processor)
 
-Assignment 3:  [Download Here](https://drive.google.com/file/d/1SMjzJmn0EjlE59kXobJl59c5MZmNftOH/view?usp=sharing)
----
+## Assignment 3: [Download Here](https://drive.google.com/file/d/1SMjzJmn0EjlE59kXobJl59c5MZmNftOH/view?usp=sharing)