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CONTRIBUTING.md

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@@ -15,7 +15,7 @@ That way someone (perhaps your future self!) will be able to quickly find the an
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### I found a bug!
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While we strive to make VTR reliable and robust, bugs are inevitable in large-scale software projects.
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Please file a [detailed bug report](#filling-bug-reports).
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Please file a [detailed bug report](#filling-bug-reports).
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This ensures we know about the problem and can work towards fixing it.
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*This is key to getting your bug fixed.*
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Provided *detailed steps* to reproduce the bug, including the exact commands to reproduce the bug.
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Attach all relevant files (e.g. FPGA architecture files, benchmark circuits, log files).
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Attach all relevant files (e.g. FPGA architecture files, benchmark circuits, log files).
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If we can't re-produce the issue it is very difficult to fix.
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How your proposed enhancement will work (from a user's perspective).
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* Contrast with current behaviour
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How will your enhancement differ from the current behaviour (from a user's perspective).
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* Potential Implementation
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This ensures any future changes which break your feature will be detected.
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It is also best to add tests when fixing bugs, for the same reason
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See [Adding Tests](README.developers.md#adding-tests) for details on how to create new regression tests.
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See [Adding Tests](README.developers.md#adding-tests) for details on how to create new regression tests.
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If you aren't sure what tests are needed, ask a maintainer.
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* How the feature has been documented

LICENSE.md

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@@ -4,25 +4,25 @@ The software package "VTR" includes the software tools ODIN II, ABC, and VPR as
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well as additional benchmarks, documentation, libraries and scripts. The authors
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of the various components of VTR retain their ownership of their tools.
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* Unless otherwise noted (in particular ABC, the benchmark circuits and some libraries),
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* Unless otherwise noted (in particular ABC, the benchmark circuits and some libraries),
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all software, documents, and scripts in VTR, follows the standard MIT license described
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[here](http://www.opensource.org/licenses/mit-license.php) copied below for
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your convenience:
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> The MIT License (MIT)
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> The MIT License (MIT)
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>
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> Copyright 2012 VTR Developers
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>
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>
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> Permission is hereby granted, free of charge, to any person obtaining a copy of
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> this software and associated documentation files (the "Software"), to deal in
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> the Software without restriction, including without limitation the rights to
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> use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
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> of the Software, and to permit persons to whom the Software is furnished to do
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> so, subject to the following conditions:
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>
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>
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> The above copyright notice and this permission notice shall be included in all
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> copies or substantial portions of the Software.
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>
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>
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> THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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> IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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> FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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for your convenience:
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> Copyright (c) The Regents of the University of California. All rights reserved.
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>
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>
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> Permission is hereby granted, without written agreement and without license or
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> royalty fees, to use, copy, modify, and distribute this software and its
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> documentation for any purpose, provided that the above copyright notice and the
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> following two paragraphs appear in all copies of this software.
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>
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>
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> IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
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> DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT OF
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> THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
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> CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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>
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>
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> THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES, INCLUDING,
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> BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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> A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS ON AN "AS IS" BASIS,

README.developers.md

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We have some guidelines in place to help catch most of these problems:
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1. Before you push code to the central repository, your code MUST pass the check-in regression test.
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1. Before you push code to the central repository, your code MUST pass the check-in regression test.
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The check-in regression test is a quick way to test if any part of the VTR flow is broken.
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At a minimum you must run:
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See [Adding Tests](#adding-tests) for details.
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4. In the event a regression test is broken, the one responsible for having the test pass is in charge of determining:
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* If there is a bug in the source code, in which case the source code needs to be updated to fix the bug, or
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* If there is a problem with the test (perhaps the quality of the tool did in fact get better or perhaps there is a bug with the test itself), in which case the test needs to be updated to reflect the new changes.
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* If there is a bug in the source code, in which case the source code needs to be updated to fix the bug, or
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* If there is a problem with the test (perhaps the quality of the tool did in fact get better or perhaps there is a bug with the test itself), in which case the test needs to be updated to reflect the new changes.
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If the golden results need to be updated and you are sure that the new golden results are better, use the command `../scripts/parse_vtr_task.pl -create_golden your_regression_test_name_here`
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5. Keep in sync with the master branch as regularly as you can (i.e. `git pull` or `git pull --rebase`).
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* MCNC20 benchmarks
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* VTR benchmarks
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* Titan 'other' benchmarks (smaller than Titan23)
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**Architectures:** A wider variety of architectures
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* `vtr_reg_weekly`: ~30 hours with `-j2`
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**Goal:** Full QoR and Performance evaluation.
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* VTR benchmarks
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* Titan23 benchmarks
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**Architectures:** A wide variety of architectures
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These can be run with `run_reg_test.pl`:
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k4_N10_memSize16384_memData64/ch_intrinsics...failed: vpr
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k4_N10_memSize16384_memData64/diffeq1...failed: vpr
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#Output trimmed...
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regression_tests/vtr_reg_basic/basic_no_timing...[Fail]
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regression_tests/vtr_reg_basic/basic_no_timing...[Fail]
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k4_N10_memSize16384_memData64.xml/ch_intrinsics.v vpr_status: golden = success result = exited
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#Output trimmed...
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Error: 10 tests failed!
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$ cp strong_timing/config/config.txt strong_mytest/config/.
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```
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You can now edit `strong_mytest/config/config.txt` to customize your test.
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2. Generate golden reference results
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Now we need to test our new test and generate 'golden' reference results.
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Note that we explicitly asked for gcc and g++, the coverity build tool defaults to these compilers, and may not like the default 'cc' or 'c++' (even if they are linked to gcc/g++).
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3. Run the coverity build tool
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```shell
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#From the build directory where we ran cmake
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cov-build --dir cov-int make -j8
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On unix-like systems run `scan-build make` from the root VTR directory.
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to output the html analysis to a specific folder, run `scan-build make -o /some/folder`
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README.md

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# Introduction
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The Verilog-to-Routing (VTR) project is a world-wide collaborative effort to provide a open-source framework for conducting FPGA architecture and CAD research and development.
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The Verilog-to-Routing (VTR) project is a world-wide collaborative effort to provide a open-source framework for conducting FPGA architecture and CAD research and development.
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The VTR design flow takes as input a Verilog description of a digital circuit, and a description of the target FPGA architecture.
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It then perfoms:
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* Elaboration & Synthesis (ODIN II)
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author={Luu, Jason and Goeders, Jeff and Wainberg, Michael and Somerville, Andrew and Yu, Thien and Nasartschuk, Konstantin and Nasr, Miad and Wang, Sen and Liu, Tim and Ahmed, Norrudin and Kent, Kenneth B. and Anderson, Jason and Rose, Jonathan and Betz, Vaughn},
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journal = {ACM Trans. Reconfigurable Technol. Syst.},
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month={June},
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volume={7},
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number={2},
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pages={6:1--6:30},
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volume={7},
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number={2},
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pages={6:1--6:30},
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year={2014}
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}
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```
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[VTR-Commits](https://groups.google.com/forum/#!forum/vtr-commits): VTR revision control commits
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# Development
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This is the development trunk for the Verilog-to-Routing project.
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Unlike the nicely packaged releases that we create, you are working with code in a constant state of flux.
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This is the development trunk for the Verilog-to-Routing project.
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Unlike the nicely packaged releases that we create, you are working with code in a constant state of flux.
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You should expect that the tools are not always stable and that more work is needed to get the flow to run.
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For new developers, please [do the tutorial](dev/tutorial/NewDeveloperTutorial.txt).
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For new developers, please [do the tutorial](dev/tutorial/NewDeveloperTutorial.txt).
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You will be directed back here once you ramp up.
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VTR development follows a classic centralized repository (svn-like) workflow.
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The 'master' branch is supposed to be the most current stable version of the project.
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Developers checkout a local copy of the code at the start of development, then do regular updates (e.g. `git pull --rebase`) to keep in sync with the GitHub master.
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VTR development follows a classic centralized repository (svn-like) workflow.
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The 'master' branch is supposed to be the most current stable version of the project.
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Developers checkout a local copy of the code at the start of development, then do regular updates (e.g. `git pull --rebase`) to keep in sync with the GitHub master.
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When a developer has a tested, working change to put back into the trunk, he/she performs a `git push` operation.
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Unstable code should remain in the developer's local copy.
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