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Merge pull request #498 from ut-issl/feature/update_readme_heritage
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OPTIMAL-1 を実績リストに修正 & 実績リストの微修正
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meltingrabbit authored Feb 27, 2023
2 parents 6b1060e + 98cf876 commit a2788a1
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7 changes: 4 additions & 3 deletions README.md
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## 採用実績・動作実績
C2A Core の採用実績のある衛星 OBC や動作実績のあるボードの情報をまとめる.

| Name | Satellite |    Lead Institution    | Launch | CPU |    Clock    |           ROM           |           RAM           |         NVRAM         |         Storage         |           Interface           | Reference |
| Name | Satellite |    Lead Institution    | Launch / Deploy | CPU |    Clock    |           ROM           |           RAM           |         NVRAM         |         Storage         |           Interface           | Reference |
| -- | -- | -- | -- | -- | -- | -- | -- | -- | -- | -- | -- |
| OBC (2U) | MAGNARO (Tigris) | Inamori Lab. at Nagoya University | 2022 | STMicroelectronics STM32F4 | 90 MHz | 2 MiB internal ROM | 384 KiB internal RAM, 500 KiB external SRAM | 524 KiB MRAM, 131 KiB EEPROM | 16 GB SD card | UART, SPI, I2C, GPIO, ADC, DCMI | [^1] |
| OBC (1U) | MAGNARO (Piscis) | Inamori Lab. at Nagoya University | 2022 | STMicroelectronics STM32F4 | 45 MHz | 2 MiB internal ROM | 384 KiB internal RAM, 500 KiB external SRAM | 524 KiB MRAM, 131 KiB EEPROM | 16 GB SD card | UART, SPI, I2C, GPIO, ADC, DCMI | [^1] |
| OBC (2U) | MAGNARO (Tigris) | Inamori Lab. at Nagoya University | 2022/10/12 | STMicroelectronics STM32F4 | 90 MHz | 2 MiB internal ROM | 384 KiB internal RAM, 500 KiB external SRAM | 524 KiB MRAM, 131 KiB EEPROM | 16 GB SD card | UART, SPI, I2C, GPIO, ADC, DCMI | [^1] |
| OBC (1U) | MAGNARO (Piscis) | Inamori Lab. at Nagoya University | 2022/10/12 | STMicroelectronics STM32F4 | 45 MHz | 2 MiB internal ROM | 384 KiB internal RAM, 500 KiB external SRAM | 524 KiB MRAM, 131 KiB EEPROM | 16 GB SD card | UART, SPI, I2C, GPIO, ADC, DCMI | [^1] |
| AOBC | OPTIMAL-1 | ArkEdge Space Inc. | 2023/01/06 | | | | | | | | |
| MOBC | ONGLAISAT | ISSL at the University of Tokyo | - | Renesas Electronics SH-2A | 200 MHz | 2.5 MiB internal ROM | 128 KiB internal RAM, 8 MiB external SRAM | 2 MiB MRAM | 2 GiB NAND flash memory | UART (RS422, LVTTL), CCSDS (LVTTL), GPIO (LVTTL), ADC | [^1] |
| AOBC | ONGLAISAT | ISSL at the University of Tokyo | - | Microchip Technology PIC32MX7 | 80 MHz | 512 KiB internal ROM | 128 KiB internal RAM | 512 KiB FRAM | None | UART (RS422, RS485, LVTTL), SPI, I2C, GPIO (LVTTL), ADC | [^1] |
| TOBC | ONGLAISAT | ISSL at the University of Tokyo | - | Microchip Technology PIC32MX7 | 30 MHz | 512 KiB internal ROM | 128 KiB internal RAM | None | None | UART (LVTTL), I2C, GPIO (LVTTL), ADC | [^1] |
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