ChiselTest v0.5.0

Feature

• iotesters: remove Driver (#451)
• formal: add btormc engine as a backend option (#436)
• formal: add softAssert method to solver (#432)
• Add Observer trait and function for Boringtools submodule drilling (#407)
• add experimental NoThreadingAnnotation as a performance hint (#419)
• Add support for chisel3.testers.BasicTester (#417)
• formal: add verify method to RawTester (#409)
• simulator: define common API for stop/assert/assume interrupts (#377)
• formal: split Solver into Solver/SolverContext (#393)
• formal: implement our own smt solver bindings + checker (#388)
• formal: add a Past(..., N) function for assert/assume statements (#386)
• formal: model undefined values in Chisel (#381)
• Minimal Formal Verification Support (#356)
• simulator: add minimal peek/poke support for memories (#358)
• Verilator JNA (#351)
• remove simulator specific Verilog coverage flags (#336)
• Verilator binary caching v1.0 (#267)
• Support for Scala 2.13 (#295)
• Adding support to Verilator 202 (#317)
• Add Support for using Vec literals (#280)
• verilator: support coverage for version 4.028 - 4.108
• Report TestCoverage from Treadle and Verilator backends (#281)
• peek on FixedPoint uses BigDecimal math (#238)
• Add Coverage Annotation for VCS and Verilator (#204)
• simulator: clarify verilator error message (#476)
• simulator: better error message when circuit has multiple input clocks (#475)
• simulator: remove debug println from caching implementation (#474)
• Support FSDB (Verdi) waveform dump (#468)

API Changes

• Use ScalaTest 3.1 for depreciation warnings (#372) (#375)
• simulator: remove old IPC option for verilator (#354)

API Deprecations

• deprecate chisel3.testers package (#472)

BugFix

• formal: fix replay for DefRandom nodes inside of submodules (#465)
• Use FirrtlPhase instead of FirrtlStage in Maltese (#463)
• formal: deal with unsigned division and remainder (#440)
• formal: if there are no asserts, the verification needs to pass (#437)
• formal: run firrtl optimizations before generating STMLib (#435)
• Read blackbox source list and pass to vcs and icarus-verilog (#428) (#429)
• Fix VcsFlags not properly passed to vcs backend (#426)
• Add support for plusargs to Verilator backend (#424)
• Handle vl_fatal in Verilator (#423)
• simulator: fix reading/writing signed ints on verilator + iverilog (#415)
• Remove final step from generic backend main loop. (#399)
• formal: fix trace replay with arbitrary values (#390)
• Add iotesters.PeekPokeTester compatibility layer (#348)
• make withAnnotations public and remove withFlags (#364)
• Fix verilator linking error (#373)
• verilator: fix black box includes (#361)
• Fix comparison of hashes for CachingAnnotation (#320)
• Use only a single version of scalatest (#261)
• Pass Coverage Flags to VCS Simulation (#239)
• bug fix for treadle API changes. (#250)
• Fix probable bug in VcsExecutive (#242)
• Fixed bug with double elaboration error (#240)
• Use second element in version string for compatibility detection (#218)

Dependency Bumping

• Update scala-library, scala-reflect to 2.13.7 (#434)
• Update jna to 5.10.0 (#438)
• Update sbt-ci-release to 1.5.10 (#418)
• Update scala-library, scala-reflect to 2.12.15 (#400)
• Update sbt-scalafmt to 2.4.3 (#331)
• Update sbt to 1.5.5
• Update utest to 0.7.9
• Update scalafmt-core to 2.7.5 (#278)

Miscellany

• Provide a suggestion in TimeoutException (#462)
• fix deprecation warnings (#452)
• Update Readme to reflect necessary imports and use of AnyFlatSpec (#448)
• vcs: run binary from os.pwd (#431)
• jna: move step loop from Scala into C++ (#420)
• Only print Verilator messages in verbose mode (#413)
• FlattenPass: add default case to avoid warning (#394)
• step() example (#384)
• compiler: run Elaborate phase (#374)
• simulator: make sure memory loading works (#362)
• simulator: extends the number of annotations that should be removed (#360)
• backend: use low-level Simulator abstraction for GenericBackend (#334)
• simulator: explicitly convert argument to bytes (#350)
• simulator: add new low level abstraction layer (#337)
• add support for verilator version 4.200
• vcs does not support coverage (#341)
• Changes to chisel have affected coverage names (#329)
• defer creation of cache hash file (#325)
• verilator: remove javax.xml.bind.DatatypeConverter and port to os-lib (#309)
• move verilator caching test to verilator specific directory (#307)
• Verilator generated artifacts is a subfolder (#303)
• test: cover statements are new reset guarded by chisel and thus the counts are one less
• Add thread ordering documentation and supporting test (#211)
• formal: demote simulation/formal mismach to a warning (#471)
• Remove VCS warning (#470)