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Bump rc/components to improve module naming #1894

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merged 3 commits into from
Jun 27, 2024
+17 −17
Merged

Bump rc/components to improve module naming #1894

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760957a
Bump rc/components to improve module naming
jerryz123 Jun 5, 2024
193e712
Bump chipyard build.sbt to 3.6.1 chisel3
jerryz123 Jun 26, 2024
2bd10de
Bump firesim
jerryz123 Jun 26, 2024
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Bump chipyard build.sbt to 3.6.1 chisel3
@jerryz123
jerryz123 committed Jun 26, 2024
commit 193e712d2ff463821fbbeb63d709074483bbc852
4 changes: 2 additions & 2 deletions build.sbt
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Original file line number Diff line number Diff line change
@@ -98,8 +98,8 @@ lazy val chisel6Settings = Seq(
addCompilerPlugin("org.chipsalliance" % "chisel-plugin" % "6.0.0" cross CrossVersion.full)
)
lazy val chisel3Settings = Seq(
libraryDependencies ++= Seq("edu.berkeley.cs" %% "chisel3" % "3.6.0"),
addCompilerPlugin("edu.berkeley.cs" % "chisel3-plugin" % "3.6.0" cross CrossVersion.full)
libraryDependencies ++= Seq("edu.berkeley.cs" %% "chisel3" % "3.6.1"),
addCompilerPlugin("edu.berkeley.cs" % "chisel3-plugin" % "3.6.1" cross CrossVersion.full)
)

lazy val chiselSettings = (if (chisel6) chisel6Settings else chisel3Settings) ++ Seq(