Merge pull request #1602 from ucb-bar/mihai-temp

Updated docs on waveform generation to match current workflow.
ucb-bar · Sep 17, 2023 · 0fd04c3 · 0fd04c3
2 parents 174ebc5 + affbdc2
commit 0fd04c3
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/docs/Simulation/Software-RTL-Simulation.rst b/docs/Simulation/Software-RTL-Simulation.rst
@@ -177,8 +177,8 @@ A special target that automatically generates the waveform file for a specific t
 For a Verilator simulation, this will generate a vcd file (vcd is a standard waveform representation file format) that can be loaded to any common waveform viewer.
 An open-source vcd-capable waveform viewer is `GTKWave <http://gtkwave.sourceforge.net/>`__.
 
-For a VCS simulation, this will generate a vpd file (this is a proprietary waveform representation format used by Synopsys) that can be loaded to vpd-supported waveform viewers.
-If you have Synopsys licenses, we recommend using the DVE waveform viewer.
+For a VCS simulation, this will generate an fsdb file that can be loaded to fsdb-supported waveform viewers.
+If you have Synopsys licenses, we recommend using the Verdi waveform viewer.
 
 Visualizing Chipyard SoCs
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