Run rustfmt.

src/bin/netmgr/src/link/ethernet.rs

@@ -1,12 +1,12 @@
 use std::sync::Arc;
 
-use byteorder::ByteOrder;
-use byteorder::NetworkEndian;
+use byteorder::{ByteOrder, NetworkEndian};
 
-use crate::header::Header;
-use crate::link::nic::NicBuffer;
-use crate::link::IncomingPacketInfo;
-use crate::network::ipv4::handle_incoming_ipv4_packet;
+use crate::{
+    header::Header,
+    link::{nic::NicBuffer, IncomingPacketInfo},
+    network::ipv4::handle_incoming_ipv4_packet,
+};
 
 #[derive(PartialEq, Eq, PartialOrd, Ord, Clone, Copy, Debug, Default)]
 #[repr(C)]

src/bin/netmgr/src/link/mod.rs

@@ -1,8 +1,7 @@
 use std::sync::Arc;
 
-use crate::header::Header;
-
 use self::nic::NicBuffer;
+use crate::header::Header;
 
 pub mod ethernet;
 pub mod nic;
@@ -56,7 +55,7 @@ impl IncomingPacketInfo {
         Some(self)
     }
 
-#[allow(dead_code)]
+    #[allow(dead_code)]
     pub fn packet_len(&self) -> usize {
         self.buffer.packet_len()
     }

src/bin/netmgr/src/network/ipv4.rs

@@ -5,9 +5,9 @@ use twizzler_net::addr::{Ipv4Addr, ServiceAddr};
 
 use crate::{
     header::Header,
-    link::nic::{NicBuffer, SendableBuffer},
     link::{
         ethernet::{EtherType, EthernetAddr, EthernetHeader},
+        nic::{NicBuffer, SendableBuffer},
         IncomingPacketInfo,
     },
     transport::handle_packet,

src/bin/netmgr/src/nics/loopback.rs

@@ -5,9 +5,9 @@ use std::{
 
 use twizzler_async::FlagBlock;
 
-use crate::{
-    link::ethernet::{EthernetAddr, EthernetError},
-    link::nic::{NetworkInterface, NicBuffer, SendableBuffer},
+use crate::link::{
+    ethernet::{EthernetAddr, EthernetError},
+    nic::{NetworkInterface, NicBuffer, SendableBuffer},
 };
 
 struct LoopbackInner {

src/bin/netmgr/src/nics/mod.rs

@@ -5,9 +5,9 @@ use std::{
 
 use twizzler_async::Task;
 
-use crate::{
-    link::ethernet::{handle_incoming_ethernet_packets, EthernetAddr},
-    link::nic::NetworkInterface,
+use crate::link::{
+    ethernet::{handle_incoming_ethernet_packets, EthernetAddr},
+    nic::NetworkInterface,
 };
 
 mod loopback;

src/bin/netmgr/src/route.rs

@@ -0,0 +1 @@
+

src/bin/netmgr/src/transport/icmp.rs

@@ -6,6 +6,7 @@ use twizzler_net::{
     ListenFlags, PacketData, RxRequest, TxCompletion,
 };
 
+use super::TransportProto;
 use crate::{
     endpoint::{foreach_endpoint, EndPointKey},
     header::Header,
@@ -17,8 +18,6 @@ use crate::{
     HandleRef,
 };
 
-use super::TransportProto;
-
 pub struct Icmp;
 
 #[async_trait::async_trait]

src/bin/netmgr/src/transport/tcp.rs

@@ -0,0 +1 @@
+

src/bin/netmgr/src/transport/udp.rs

@@ -0,0 +1 @@
+

src/bin/pager/src/main.rs

@@ -1,15 +1,12 @@
-use std::time::Duration;
+use std::{collections::BTreeMap, time::Duration};
 
+use tickv::{success_codes::SuccessCode, ErrorCode};
 use twizzler_abi::pager::{
     CompletionToKernel, CompletionToPager, KernelCompletionData, RequestFromKernel,
     RequestFromPager,
 };
 use twizzler_object::{ObjID, Object, ObjectInitFlags, Protections};
 
-use std::collections::BTreeMap;
-
-use tickv::{success_codes::SuccessCode, ErrorCode};
-
 use crate::store::{Key, KeyValueStore};
 
 mod nvme;
@@ -117,7 +114,7 @@ impl<'a> Tester<'a> {
             let _ = self.get(k);
             let num = quick_random() % 3;
             if num == 0 || num == 2 {
-                let _ = self.put(k, Foo { x: x });
+                let _ = self.put(k, Foo { x });
             } else if num == 1 {
                 let _ = self.del(k);
             }

src/bin/pager/src/nvme/controller.rs

@@ -4,7 +4,7 @@ use std::{
 };
 
 use nvme::{
-    admin::CreateIOCompletionQueue,
+    admin::{CreateIOCompletionQueue, CreateIOSubmissionQueue},
     ds::{
         controller::properties::config::ControllerConfig,
         identify::controller::IdentifyControllerDataStructure,
@@ -13,10 +13,9 @@ use nvme::{
             comentry::CommonCompletion, subentry::CommonCommand, CommandId, QueueId, QueuePriority,
         },
     },
-    hosted::memory::PrpMode,
+    hosted::memory::{PhysicalPageCollection, PrpMode},
     nvm::{ReadDword13, WriteDword13},
 };
-use nvme::{admin::CreateIOSubmissionQueue, hosted::memory::PhysicalPageCollection};
 use twizzler_async::Task;
 use twizzler_driver::{
     dma::{DmaOptions, DmaPool, DMA_PAGE_SIZE},
@@ -25,9 +24,8 @@ use twizzler_driver::{
 };
 use volatile::map_field;
 
-use crate::nvme::dma::NvmeDmaSliceRegion;
-
 use super::{dma::NvmeDmaRegion, requester::NvmeRequester};
+use crate::nvme::dma::NvmeDmaSliceRegion;
 
 pub struct NvmeController {
     requester: RwLock<Vec<Requester<NvmeRequester>>>,
@@ -239,7 +237,8 @@ impl NvmeController {
             .unwrap();
 
         {
-            // TODO: we should save these NvmeDmaRegions so they don't drop (dropping is okay, but this leaks memory )
+            // TODO: we should save these NvmeDmaRegions so they don't drop (dropping is okay, but
+            // this leaks memory )
             let cmd = CreateIOCompletionQueue::new(
                 CommandId::new(),
                 cqid,

src/bin/pager/src/store.rs

@@ -69,7 +69,8 @@ pub fn hasher<T: std::hash::Hash>(t: &T) -> u64 {
     let mut h = DefaultHasher::new();
     t.hash(&mut h);
     let x = h.finish();
-    // Don't ever hash to 0, 1, MAX, or MAX-1. Makes the open addressing easier, and 0 and MAX-1 are required for tickv.
+    // Don't ever hash to 0, 1, MAX, or MAX-1. Makes the open addressing easier, and 0 and MAX-1 are
+    // required for tickv.
     match x {
         0 => 2,
         u64::MAX => u64::MAX - 2,

src/kernel/macros/src/lib.rs

@@ -1,13 +1,12 @@
 #![feature(extend_one)]
 
-use proc_macro::TokenStream;
-use proc_macro::TokenTree;
+use proc_macro::{TokenStream, TokenTree};
 extern crate proc_macro;
 
 #[proc_macro_attribute]
-// Okay, look, I know what you're gonna say. Why do we need to get this complicated just to do tests.
-// The answer is names. See, our friends in the rust community have not fully implemented this issue:
-// https://github.com/rust-lang/rust/issues/50297. Until this is implemented, I don't know how to grab
+// Okay, look, I know what you're gonna say. Why do we need to get this complicated just to do
+// tests. The answer is names. See, our friends in the rust community have not fully implemented
+// this issue: https://github.com/rust-lang/rust/issues/50297. Until this is implemented, I don't know how to grab
 // name from a test function in a way that makes the test _runner_ know the names of the tests it's
 // running. So we just embed the name ourselves using #[test_case].
 pub fn kernel_test(_attr: TokenStream, items: TokenStream) -> TokenStream {

src/kernel/src/arch/aarch64/address.rs

@@ -3,15 +3,16 @@
 /// https://developer.arm.com/documentation/100940/0101/?lang=en
 /// and the Arm Architecture Reference Manual for A-profile architecture
 /// https://developer.arm.com/documentation/ddi0487/latest
-
-use core::{fmt::LowerHex, ops::{Sub, RangeInclusive}};
+use core::{
+    fmt::LowerHex,
+    ops::{RangeInclusive, Sub},
+};
 
 use arm64::registers::ID_AA64MMFR0_EL1;
 use registers::interfaces::Readable;
 
-use crate::once::Once;
-
 use super::memory::phys_to_virt;
+use crate::once::Once;
 
 /// A representation of a canonical virtual address.
 #[derive(Clone, Copy, PartialEq, PartialOrd, Ord, Eq)]
@@ -32,26 +33,26 @@ impl VirtAddr {
 
     /// The start of the kernel object mapping.
     const KOBJ_START: Self = Self(0xFFFF_F000_0000_0000);
-    
+
     // TTBR0_EL1 points to a page table root for addresses ranging from
     // 0x0 to 0x0000_FFFF_FFFF_FFFF. Generally this is used to cover
     // user accessible memory (EL0).
     const TTBR0_EL1: RangeInclusive<u64> = RangeInclusive::new(
         // The start range of valid addresses that TTBR0 covers
         0x0000_0000_0000_0000,
         // The end range of valid addresses that TTBR0 covers
-        0x0000_FFFF_FFFF_FFFF
+        0x0000_FFFF_FFFF_FFFF,
     );
 
     // TTBR1_EL1 -> a pt root for addresses ranging from
     // 0xFFFF_FFFF_FFFF_FFFF to 0xFFFF_0000_0000_0000
-    // Generally this is used to cover exclusively 
+    // Generally this is used to cover exclusively
     // kernel accessible memory (EL1).
     const TTBR1_EL1: RangeInclusive<u64> = RangeInclusive::new(
         // The start range of valid addresses that TTBR1 covers
         0xFFFF_0000_0000_0000,
         // The end range of valid addresses that TTBR1 covers
-        0xFFFF_FFFF_FFFF_FFFF
+        0xFFFF_FFFF_FFFF_FFFF,
     );
 
     // The size of the virtual address range reserved for MMIO.
@@ -64,7 +65,7 @@ impl VirtAddr {
         // The start range of addresses used for MMIO
         *Self::TTBR1_EL1.start(),
         // The end range of addresses used for MMIO
-        *Self::TTBR1_EL1.start() + Self::MMIO_RANGE_SIZE
+        *Self::TTBR1_EL1.start() + Self::MMIO_RANGE_SIZE,
     );
 
     /// The bits that are valid which are used in address translation
@@ -73,11 +74,11 @@ impl VirtAddr {
     const VALID_HIGH_ADDRESS: u64 = 0xFFFF;
     /// The valid value for the upper bits of a low address
     const VALID_LOW_ADDRESS: u64 = 0x0;
- 
+
     pub const fn start_kernel_memory() -> Self {
         Self(*Self::TTBR1_EL1.start())
     }
-    
+
     pub const fn start_kernel_object_memory() -> Self {
         Self::KOBJ_START
     }
@@ -98,22 +99,21 @@ impl VirtAddr {
         Self(*Self::TTBR0_EL1.end())
     }
 
-    /// Construct a new virtual address from the provided addr value, only if the provided value is a valid, canonical
-    /// address. If not, returns Err.
+    /// Construct a new virtual address from the provided addr value, only if the provided value is
+    /// a valid, canonical address. If not, returns Err.
     pub const fn new(addr: u64) -> Result<Self, NonCanonical> {
-        // The most significant 16 bits of an address must be 0xFFFF or 0x0000. 
+        // The most significant 16 bits of an address must be 0xFFFF or 0x0000.
         // Any attempt to use a different bit value triggers a fault.
         // For now we assume that virtual address tagging is disabled.
-        let top_two_bytes = addr
-            .checked_shr(Self::VALID_ADDR_BITS)
-            .unwrap();
+        let top_two_bytes = addr.checked_shr(Self::VALID_ADDR_BITS).unwrap();
         match top_two_bytes {
             Self::VALID_HIGH_ADDRESS | Self::VALID_LOW_ADDRESS => Ok(Self(addr)),
             _ => Err(NonCanonical),
         }
     }
 
-    /// Construct a new virtual address from a u64 without verifying that it is a valid virtual address.
+    /// Construct a new virtual address from a u64 without verifying that it is a valid virtual
+    /// address.
     ///
     /// # Safety
     /// The provided address must be canonical.
@@ -239,7 +239,7 @@ impl PhysAddr {
                 Some(ID_AA64MMFR0_EL1::PARange::Value::Bits_44) => 44,
                 Some(ID_AA64MMFR0_EL1::PARange::Value::Bits_48) => 48,
                 Some(ID_AA64MMFR0_EL1::PARange::Value::Bits_52) => 52,
-                _ => unimplemented!("unknown PA size")
+                _ => unimplemented!("unknown PA size"),
             }
         })
     }
@@ -253,7 +253,8 @@ impl PhysAddr {
         }
     }
 
-    /// Construct a new physical address from a u64 without verifying that it is a valid physical address.
+    /// Construct a new physical address from a u64 without verifying that it is a valid physical
+    /// address.
     ///
     /// # Safety
     /// The provided address must be a valid address.

src/kernel/src/arch/aarch64/cntp.rs

@@ -1,14 +1,12 @@
 /// The `ClockHardware` interface for the CNTP_EL0 timer
 /// This timer is local to a single core, and timestamps
 /// are synchronized to a global system timer count
-
 use arm64::registers::{CNTFRQ_EL0, CNTPCT_EL0, CNTP_CTL_EL0, CNTP_TVAL_EL0};
-use registers::interfaces::{Readable, Writeable, ReadWriteable};
+use registers::interfaces::{ReadWriteable, Readable, Writeable};
+use twizzler_abi::syscall::{ClockFlags, ClockInfo, FemtoSeconds, TimeSpan, FEMTOS_PER_SEC};
 
 use crate::time::{ClockHardware, Ticks};
 
-use twizzler_abi::syscall::{ClockFlags, ClockInfo, FemtoSeconds, TimeSpan, FEMTOS_PER_SEC};
-
 /// The Non-secure physical timer `CNTP` for EL0.
 pub struct PhysicalTimer {
     info: ClockInfo,
@@ -44,7 +42,7 @@ impl PhysicalTimer {
         // round up
 
         // ticks = time / rate => span as femtos / rate (in femtos)
-        let ticks =  span.as_femtos() / self.info.resolution().0 as u128;
+        let ticks = span.as_femtos() / self.info.resolution().0 as u128;
 
         // configure the timer to fire after a certain amount of ticks have passed
         //
@@ -53,9 +51,7 @@ impl PhysicalTimer {
         CNTP_TVAL_EL0.set(ticks as u64);
 
         // clear the interrupt mask and enable the timer
-        CNTP_CTL_EL0.modify(
-            CNTP_CTL_EL0::IMASK::CLEAR + CNTP_CTL_EL0::ENABLE::SET
-        );
+        CNTP_CTL_EL0.modify(CNTP_CTL_EL0::IMASK::CLEAR + CNTP_CTL_EL0::ENABLE::SET);
     }
 }
 
@@ -81,7 +77,7 @@ pub fn cntp_interrupt_handler() {
     // handle the timer interrupt by advancing the scheduler ticks
     crate::clock::oneshot_clock_hardtick();
 
-    // Disable the timer to clear the interrupt. Software must clear 
+    // Disable the timer to clear the interrupt. Software must clear
     // the interrupt before deactivating the interrupt in the
     // interrupt controller, otherwise it will keep firing.
     //

src/kernel/src/arch/aarch64/context.rs

@@ -88,10 +88,11 @@ impl ArchContext {
     /// Switch to a target context.
     ///
     /// # Safety
-    /// This function must be called with a target that comes from an ArchContext that lives long enough.
+    /// This function must be called with a target that comes from an ArchContext that lives long
+    /// enough.
     pub unsafe fn switch_to_target(tgt: &ArchContextTarget) {
-        // TODO: If the incoming target is already the current user table, this should be a no-op. Also, we don't
-        // need to set the kernel tables each time.
+        // TODO: If the incoming target is already the current user table, this should be a no-op.
+        // Also, we don't need to set the kernel tables each time.
         // write TTBR1
         TTBR1_EL1.set_baddr(KERNEL_TABLE_ADDR.raw());
         // write TTBR0

src/kernel/src/arch/aarch64/exception.rs

@@ -12,9 +12,10 @@ use registers::{
     interfaces::{Readable, Writeable},
     registers::InMemoryRegister,
 };
-
-use twizzler_abi::arch::syscall::SYSCALL_MAGIC;
-use twizzler_abi::upcall::{MemoryAccessKind, UpcallFrame};
+use twizzler_abi::{
+    arch::syscall::SYSCALL_MAGIC,
+    upcall::{MemoryAccessKind, UpcallFrame},
+};
 
 use super::thread::UpcallAble;
 use crate::memory::{context::virtmem::PageFaultFlags, VirtAddr};

src/kernel/src/arch/aarch64/image.rs

@@ -1,5 +1,4 @@
 /// TLS initialization for the kernel image
-
 use crate::{
     image::{TlsInfo, TlsVariant},
     memory::VirtAddr,