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add examples/cdsl/ExampleGPR32Pair.core_desc file #127

add examples/cdsl/ExampleGPR32Pair.core_desc file

add examples/cdsl/ExampleGPR32Pair.core_desc file #127

Triggered via push May 31, 2024 11:40
Status Success
Total duration 21s
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style.yml

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11 errors and 3 warnings
docs/conf.py#L17
Line too long (138 > 120 characters) (E501)
seal5/backends/riscv_features/writer.py#L27
Line too long (133 > 120 characters) (E501)
seal5/backends/riscv_features/writer.py#L29
Line too long (150 > 120 characters) (E501)
/home/runner/work/seal5/seal5/docs/conf.py#L4
# https://www.sphinx-doc.org/en/master/usage/configuration.html # -- Project information ----------------------------------------------------- # https://www.sphinx-doc.org/en/master/usage/configuration.html#project-information -project = 'Seal5' -copyright = '2024, TUM Department of Electrical and Computer Engineering - Chair of Electronic Design Automation' -author = 'TUM Department of Electrical and Computer Engineering - Chair of Electronic Design Automation' -release = 'v0.1.0' +project = "Seal5" +copyright = "2024, TUM Department of Electrical and Computer Engineering - Chair of Electronic Design Automation" +author = "TUM Department of Electrical and Computer Engineering - Chair of Electronic Design Automation" +release = "v0.1.0" # -- General configuration --------------------------------------------------- # https://www.sphinx-doc.org/en/master/usage/configuration.html#general-configuration -extensions = ["sphinx.ext.autodoc", "sphinx.ext.autosummary", "sphinx.ext.viewcode", "myst_parser", "numpydoc", "sphinxemoji.sphinxemoji"] +extensions = [ + "sphinx.ext.autodoc", + "sphinx.ext.autosummary", + "sphinx.ext.viewcode", + "myst_parser", + "numpydoc", + "sphinxemoji.sphinxemoji", +] numpydoc_show_class_members = False autosummary_generate = True # Turn on sphinx.ext.autosummary -templates_path = ['_templates'] -exclude_patterns = ['_build', 'Thumbs.db', '.DS_Store'] +templates_path = ["_templates"] +exclude_patterns = ["_build", "Thumbs.db", ".DS_Store"] -root_doc = 'index' +root_doc = "index" # -- Options for HTML output ------------------------------------------------- # https://www.sphinx-doc.org/en/master/usage/configuration.html#options-for-html-output # html_theme = 'alabaster' -html_theme = 'sphinx_rtd_theme' -html_static_path = ['_static'] +html_theme = "sphinx_rtd_theme" +html_static_path = ["_static"]
seal5/transform/collect_register_operands/visitor.py#L186
Line too long (122 > 120 characters) (E501)
/home/runner/work/seal5/seal5/seal5/transform/collect_register_operands/visitor.py#L181
reg_class = model.Seal5RegisterClass.CSR else: assert offset == 0 # TODO: write offset to Operand class? reg_class = model.Seal5RegisterClass.UNKNOWN if not isinstance(op, model.Seal5RegOperand): - op = model.Seal5RegOperand(op.name, op.ty, op.attributes, op.constraints, reg_class=reg_class) + op = model.Seal5RegOperand( + op.name, op.ty, op.attributes, op.constraints, reg_class=reg_class + ) reg_ty = model.Seal5Type(arch.DataType.U, mem_size, mem_lanes) op.reg_ty = reg_ty context.operands[op_name] = op elif isinstance(index_left, behav.BinaryOperation): # print("index_left -> binop")
seal5/transform/collect_register_operands/visitor.py#L202
Line too long (139 > 120 characters) (E501)
/home/runner/work/seal5/seal5/seal5/transform/collect_register_operands/visitor.py#L197
if index_left.op.value == "+": # print("op.value -> +") offset = None # print("il.l", index_left.left) # print("il.r", index_left.right) - if isinstance(index_left.left, behav.NamedReference) and isinstance(index_left.left.reference, arch.BitFieldDescr): + if isinstance(index_left.left, behav.NamedReference) and isinstance( + index_left.left.reference, arch.BitFieldDescr + ): # print("index_left.left -> bfr") assert index_left.left.reference.name == op_name, "slice base register missmatch" if isinstance(index_left.right, behav.IntLiteral): offset = index_left.right.value - elif isinstance(index_left.right, behav.NamedReference) and isinstance(index_left.right.reference, arch.BitFieldDescr): + elif isinstance(index_left.right, behav.NamedReference) and isinstance( + index_left.right.reference, arch.BitFieldDescr + ): # print("index_left.right -> bfr") assert index_left.right.reference.name == op_name, "slice base register missmatch" if isinstance(index_left.left, behav.IntLiteral): offset = index_left.left.value else:
seal5/transform/collect_register_operands/visitor.py#L207
Line too long (143 > 120 characters) (E501)
/home/runner/work/seal5/seal5/seal5/transform/collect_register_operands/visitor.py#L218
reg_class = model.Seal5RegisterClass.GPR32Pair # print("reg_class", reg_class) # print("op", op) if not isinstance(op, model.Seal5RegOperand): # print("not is") - op = model.Seal5RegOperand(op.name, op.ty, op.attributes, op.constraints, reg_class=reg_class) + op = model.Seal5RegOperand( + op.name, op.ty, op.attributes, op.constraints, reg_class=reg_class + ) else: pass # print("skipping") # TODO: check for conflicts # print("op_", op) # input("124")
seal5/transform/collect_register_operands/visitor.py#L223
Line too long (122 > 120 characters) (E501)
Check for License headers
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