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SEAL5 CI/CD Flow: Build ETISS #152

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@kebi-be kebi-be commented Oct 23, 2024

This workflow will receive trigger from DLR-SE/riscv-coredsl-description or SEAL5 repositories to start building etiss for all riscv-coredsl-description files .

  • Squash commits to single commit before merge
  • kebi-be/seal5 should be changed to tum-eda/seal5
  • secret token from tum-eda must be made available for tum-eda/etiss to send trigger (repository_dispatch) event to tum-eda/seal5

For the s4emac example changes from github.com/wysiwyng/etiss.git --branch coverage must be merged to the upstream version for the workflow to be successful

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@PhilippvK PhilippvK left a comment

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@kebi-be Thank you for the PR. I added some comments with possible improvements. If you have questions, please reach out to me.


on:
repository_dispatch:
types: [s4e-cdl-event, seal5-event]
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cdl -> cdsl?

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changed

on:
repository_dispatch:
types: [s4e-cdl-event, seal5-event]
#push:
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remove comment

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Or comment it in, if we want the workflow to be executed when etiss has new commits (which might be a good idea...)

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commented this in.

ABI: ilp32

jobs:
setup-run-M2ISAR:
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setup-run-M2ISAR -> setup-run-m2isar

git clone https://github.com/tum-ei-eda/etiss_arch_riscv.git --recursive --branch coredsl_exceptions
git clone https://github.com/tum-ei-eda/M2-ISA-R.git --branch coredsl2
cd M2-ISA-R
virtualenv -p python3.10 venv #Alternative (requires `apt install python3-venv`): python3 -m venv venv
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Remove alternative comment

@@ -0,0 +1,133 @@
name: Build ETISS
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The workflow name and filename should be a bit more precise:

  • We do not only build etiss. The workflow runs m2isar, patches etiss and then builds it
  • This workflow is currently S4EMac specific. This should probably be indicated somewhere
  • Ideally we could extend this to support other archs than RV32IMCXS4EMAC. This should be feasible by moving the env: contents into a CI matrix and adding conditionals tto the steps below. I think we should discuss this after the PR is merged as it would require more testing...

- run: |
git config --global url."https://github.com/".insteadOf [email protected]:
git config --global url."https://".insteadOf git://
git clone [email protected]:wysiwyng/etiss.git etiss_source --branch coverage
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@PhilippvK PhilippvK Oct 23, 2024

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This should ideally just clone the etiss repository using the actions/checkout action.

(@kebi-be Oops, I just saw you comment)

To get rid of this, @wysiwyng would need to merge the coverage related commits to upstream etiss.

cd etiss_source
cp ArchImpl/RV32IMACFD/RV32IMACFDArchSpecificImp.cpp ArchImpl/RV32IMCXS4EMAC/RV32IMCXS4EMACArchSpecificImp.cpp
sed -i "s/RV32IMACFD/RV32IMCXS4EMAC/g" ArchImpl/RV32IMCXS4EMAC/RV32IMCXS4EMACArchSpecificImp.cpp
git config --global user.email "[email protected]"
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Maybe use this to be more generic?



git config --global user.name "${GITHUB_ACTOR}"
git config --global user.email "${GITHUB_ACTOR}@users.noreply.github.com"

- name: Send ETISS RUN-ID to Seal5
uses: peter-evans/repository-dispatch@v3
with:
token: ${{ secrets.REPO_ACCESS_TOKEN }}
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@PhilippvK PhilippvK Oct 23, 2024

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Please provide the secrets we need to add to the etiss repo settings

(@kebi-be Oops, I just saw you comment)

@PhilippvK
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@wysiwyng If this flow seems to work fine, we should extend it to automatically open up a PR with the new/patched Architecture. (Not only for S4EMAC but also RV{32,64}IMAFDC)

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IMO this doesn't belong in this repository. The main source for the RISC-V model in this repository is still https://github.com/tum-ei-eda/etiss_arch_riscv, and the main ETISS repository should only contain a non-specialized RV32/64GC core.

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3 participants